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initially
positive since
the
output
switch
is
at
a
negative
potential
when
the
generator
is
in
a
standby
state.
The
Main
Generator
functions normally,
as
if
in
the
CONT
mode,
for
the duration of the
gating
pulse.
Although
the
sync
pulse
is
applied to the clock input of IC6, the input
signal
is
overridden
by
the
positive gating potential at
the
direct
set
input
(pin
9)
and
Q
remains
at
ground
potential.
When
the
gating
signal
returns to
ground
potential,
IC6
is
ready
to
resume
its
initial
state
triggered
by
the next
negative portion of
the
sync
pulse.
The
output
of
IC6
is
levehshifted
and
gated
with sync output.
When
both
Q39
and
Q35
emitters
become
positive,
the
anodes
of
CR8
and
CR1
1
become
positive.
Thus,
(21+)
current
out
of the base-
line
correction
circuit
flows through
CR6
to
ground. Since
point
C
becomes
negative
when
the sync pulse changes
its
state,
point
A
moves
toward
the negative potential
until
the current
through
CR8
is
completely
supplied
through
CR5,
thus
clamping
point
A
to ground.
See
Figure
3-10
for
a
diagram
of the timing
relationship.
BASELINE
CORRECTION
CIRCUIT
The
Baseline
Correction
Circuit
is,
essentially, a
current
source
as
described
in
the
Main Generator
description.
The
purpose
of
this circuit
is
to
provide twice
as
much
current
as
the negative current source
(I—) for
the
inte-
grator
of the
Main
Generator, so that the
baseline
remains
at
zero
volts
when
the generator
is
in
the
standby
condition
for
the
TRIG
or
GATED
modes.
The
output
of the nega-
tive
current source
in
the
Main Generator
is
used
to control
this
positive
current
source.
The
current
at
TP9
is
fed to the
positive
input of
IC4
through R78. IC4
and
Q30
form
a
voltage follower
such
that the
same
amount
of current flows
through
R82
and
R83,
with
CR17
acting as
a
voltage
shifter.
Q32,
IC5,
Q33,
and
Q34
form
another
voltage follower
which
produces
twice
as
much
current
as
the
Main Generator
negative
current source
(I—).
R85
is
provided
to adjust the
dc
offset of
the
second
voltage follower.
This
adjustment
is
made when
the generator
is
in
the
TRIG
or
the
GATED
mode.
R85
is
set
to
1/1000th
of the
maximum
frequency
for
the
range, thus,
allowing the
minimum
amount
of
current flow
through the
programming
resistor.
SWEEP
GENERATOR
Voltage Controlled Current Source
Transistors
Q7, Q8, and
Q9
together
with
resistors
form
a
current
source
for
the
passive
integrator.
Since the
collector of
Q7A
is
held at
a
constant voltage
by
the
reference
diode
Q8,
the
collector of
Q7B
is
a
current
source
for
the
passive integrator.
Since the
collector
of
Q7A
is
held
at a
constant
voltage
by
the reference
diode
Q8,
the
collector
of
Q7B
is
a
current source
output which
is
controlled
by
the range
resistors
and
the
VERNIER
potentiometer R33.
The
transistor
Q9
is
a transistor
switch
which
turns off the
current source
when
the emitter
is
grounded
since
Q9
becomes
a
zener
diode and
biases
the
emitter of
Q7B
to be nearly equal to the
base.
Voltage Follower
The
transistors
Qt5
through
Q22
form
a
noninverting
isolation
amplifier for the passive
integrator.
The
potentio-
meter
R43
adjusts
the
dc
offset
of the
amplifier.
Q17
and
Q18
are
matched
junction
field
effect transistors
which
provides high input
impedance and wide band
response.
Q15
and
Q16
are
constant current source providing high
voltage gain to the
Q17
and
Q18
stage.
The
output
is
buffered
and
level-shifted
by
Q19
and Q21.
Q20
and
Q22
form
a
push-pull emitter follower
in
order
to provide the
low impedance
output.
Peak Detector
Q24
is
the
peak
detector.
Q24A
turns off
when
the
posi-
tive
peak
is
reached
since the
Q24B
is
referenced to
+5
volts.
The
adjustment
of
sawtooth peak
voltage
is
accom-
plished
by
potentiometer R75.
When Q24A
turns
off,
Q26
turns
off,
thus allowing the
Q28
to turn on.
Q28
in
turn
changes
the reference voltage of
Q24B
to zero
volt,
Q14
also
turns off
when
Q24A
turns
off.
Thus,
Q12
turns on,
discharging the timing capacitor.
Zero Detector
Q25
is
the zero
detector.
Q25B
is
referenced to
ground.
Thus,
Q25A
turns
on only
when
the
sawtooth output
reaches near zero
volt.
When
Q25A
turns on,
Q27
turns
on,
which
in
turn turns off
Q28,
allowing the
peak
detector
reference to return to
the
normal
voltage
(+5
volts).
Q24B
turns
off.
Then
Q24A
turns on, causing
Q14
to turn on.
The
discharging path
through
Q12
for
the timing capacitor
is
removed,
allowing the
integrator
to
move
toward
the
positive
peak.
Thus, continuous generation of the sawtooth
wave
is
accomplished.
When
the
Model 144
is
in
the
TRIG SWP
mode,
IC3
output
(Q)
is
positive.
Therefore,
Q10
and
Q11
are
oh
while
Q9
is
turning off the current
source.
The
timing
capacitor
is
shorted
to
ground through QIO.
When
a
trigger
pulse
is
applied to the direct
clear
input
(Cp)
of
the
ICS
the
output immediately changes
the
state
allowing
Q9, QIO, and
Q1
1
to turn
off.
The
integration
takes
place.
When
the
peak
voltage
is
reached, the
output
of
Q23
emitter follower creates
a
narrow
pulse to toggle the ICS.
3-12
8/72
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