Table of Contents
Advertisement
Potentiometer
R228
is
used to
calibrate
the
gain
of the
amplifier
and
C95
is
used
to
calibrate
the
overshoot of
the square
wave
output.
The 30
V
P-P
MAX
control
R172
provides
continuous adjustment
of the
output
level
over
a
range of
0
to
—20
dB. This
is
in
addition to the attenuation
provided
by
the
output
step attenuator. Calibration poten*
tiometer
R188
is
used to zero the
offset
of the
output
amplifier,
and
R167
is
the
front panel
DC OFFSET
potentiometer.
OUTPUT ATTENUATOR
The
Output
Attenuator
consists
of four
pi
attenuators with
some
modification to
minimize
the
number
of
components
used.
The
four attenuators
employed
are
—
lOdB,
—
20dB,
or
two
—30
dB
attenuators;
all
with 50f2 input and output
impedances.
When
the
OUTPUT
ATTENuator
control
is
used
to
select
—10
dB,
—20
dB, or
—30
dB;
only
one
pi
attenuator
is
used.
When -40
dB,
-50
dB,
or
-60
dB
is
selected;
the
second
30
dB
pi
attenuator
is
used
in
series
with the appropriate
anenuator
to yield the desired
total
attenuation.
Figure 3-9
—
Simplified
Output
Attenuator
3.2.2
Sweep
Generator
and
Trigger
Logic
Refer to Figure
3-10.
The
TRIG
and
GATED
modes
are
made
possible
by
the addition of
two matched
diodes,
CR5
and
CR6,
to the
Current Control
Diode
Bridge of the
Main
Generator.
The
remaining
control
circuits
are located
on
the
Sweep
Board.
Baseline correction
circuits,
the
Diode
OR
Gate,
and
the Trigger/Gate Control
circuit
comprise
the remaining
circuitry.
In
the
standby
condition,
the
output
of the Triangle
Amplifier (point
B)
is
at
zero
volts.
The
Hysteresis
Switch
output
is
at a
negative potential,
thus switching
off
CR7
and
CR9.
Current flows out
of the
baseline correction
circuit
while
being controlled
by
the Trigger/Gate Control
circuit
on
the
Sweep
Board.
One
half
of the current flows
through
CR5
and
CR8
to
the
negative current
source
(I—)
and
the other
half
of the current flows
through
CR6
to ground. This
establishes
ground
potential at
the
cathode
of
CRB.
When
the
anodes
of
CR5
and
CRB
become
negative,
CR5
and
CRB
are
switched
off,
and
the
triangle
generator begins to
oscillate
normally.
TRIGGER LEVEL
COMPARATOR/SQUARING
CIRCUIT
Refer
to
Figure
3-4,
3-10 and
the
Sweep
Board
schematic
(144-212)
at
the
rear
of
this
manual.
IC1
forms
a
comparator-amplifier widi an
integrated
con-
stant
current source.
When
the
positive
portion of an input
triggering signal
overcomes
the
trigger
level
set
by
TRIG
LEVEL
control
R1,
input
transistor
of IC1
turns on,
forcing
output
transistor
of
IC1 to turn
off.
Q3
and
Q4
form
a pair of
Differential
Switches to
shift
the voltage
output of
IC1
back
to the
ground
reference
signal
while
further
speeding
up
the switching
action.
When
the nega-
tive
portion of an input
triggering
signal
overcomes
the
hysteresis established
by
R6
and R7,
input
transistor
of IC1
turns
off,
forcing
output
transistor
of IC1 to turn on.
Thus, the output of the
Trigger Level
Comparator/Squaring
Circuit,
at
the
collector
of
Q3,
is
a
pulse
with
rapid
rise
and
fall
times.
This
pulse has
a
duration
determined
by
the
width
of the input
signal
applied to the
TRIG
IN
connector
and
die threshold established
by
the
TRIG
LEVEL
control,
except
when
a step voltage
is
applied.
Q5
and
Q6
are inverting
Saturated
Switches
for
the
GATED
and
the
SWP
HOLD
modes. These
Saturated Switches
further
reduce
the
rise
and
fall
times of
a gating pulse
created
by
the Trigger
Level
Comparator, Squaring
Circuit.
In
the
TRIG
or
TRIG SWP
modes,
Q5
and
Q6
are
coupled
through
a small capacitor
(C3 and C4)
to create
narrower
pulses for
triggering
die
respective
circuits.
TRIGGER/GATE
CONTROL
The
Trigger/Gate Control
circuit
is
best
understood by
studying the timing
relationship
shown
in
Figure
3-10
when
the generator
Is
in
the
GATED
mode.
When
a
signal
is
applied to the
TRIG
IN connector
and
the
TRIG
LEVEL
control
is
adjusted properly, a gating pulse
appears
at
the
collector
of
Q6.
This pulse
is
coupled through
the
MODE
switch to the
direct
set (pin
9)
input of
IC6, a
J-K
flip^
flop.
The
positive
signal
at pin
9
forces the
output
Q
(pin
6)
change
state
to
ground
potential.
The
output
is
shifted
in level
by
Q38
and
Q39
to
a
negative
potential.
Diodes
CR8
and
CR11
form
an
"OR"
Gate.
As
soon
as
3-10
12/70
Advertisement
Table of Contents
