Schematic Diagrams - HP 3580A Operating And Service Manual

Model 3580A
Section VII
Sample Rate:
Function:
Multiplier:
Channel A:
Fast
T.1. A to B
.1 sec.
Slope -
D.C.
Atten XI
reference designations. Refer to Table 74 for a complete
cross reference listing. Refer to the General Schematic
Notes for further information concerning the schematic
diagrams.
Table 7-4. Assembly Cross Reference.
Level: set to trigger on negative
edge of pulse.
Schematic
Channel B: Slope+
D.C.
Atten Xl
Assembly Number
Assembly Title Number
Level: set to trigger on positive
edge of pulse.
BNC Input: Com
The time interval should be 10.4 to 10.6 sec. The other
sweep times can be easily tested at this time. The time
interval should be 10.5
x
SWEEP TIME/DIV(± 5%).
7-40. SCHEMATIC DIAGRAMS.
741. The schematic diagrams, Figure 7-3 through 7-12
show the detailed circuits of the Model 3580A. Each
schematic is assigned a numerical callout (1 through 10)
which is used for referencing. The schematics are arranged
to provide as much signal continuity as possible and
assemblies do not necessarily appear in the order of their
A2 (035B1-66502)
A3 (035B0-66503)
A4 (035B1-66504)
A5 (035B0-66505)
A6 (035B0-66506)
A7 (035B0-66507)
or
(035B0-69507)
AB (035B0-6650B)
A9 (035B0-66509)
(Standard)
(035B0-66519)
(Option 002)
A10 (03580-66510
A11A1 (03580-66531)
A 11 A2 (03580-66532)
and
(03580-66537)
A 1 3 (03580-6651 3)
A14 (03580-66514)
A15 (03580-66515)
A 1 6 (03580-6651 6)
A18 (03581-6651B, Opt.
002 only)
REFERENCE DESIGNATIONS
ASSEMBLY ASSE:MBLY
REFERENCE: ASSEMBLY PART NUMBER
DESIGNATION NAME (INCLUDES AZAI SUBASSEMBLY)
JACK XAZ IS MOUNTED ON
CHASSIS OR ANOTHER ASSEMBLY~
~2
: , I
Pl IS NOT MOUNTED
ON AZ ASSE:MBLY :
(COMPLETE: DESIGNATOR IS Pl) '
,.----A...--,
~ ~
A2
POWER SUPPLY (OOXXX-66501)
PLUG Pl IS MOUNTE:D ON ASSE:MBLY OR IS PART
1'7/0F THE ASSEMBLY BOARD (COMPLE:TE: DESIGNATOR IS AZPI)
Pl
R3 TEST VOLTAGE"""
+Zo92V
VTO Tracking Oscillator
Main and Log Sweep
Detector
IF Filter
Low Voltage Power Supply
Digital Storage
Control Board
Input Circuits
Connector Board
tJigh Voltage
HV Transformer
Deflection Amp.
Bandwidth/Sweep Time
Freq Span/Sweep Mode
Combining Board
Balanced Input
I
I
DE:NOTES SIGNAL
I
CONNECTION
6
4
3
2
9
7
B
1
7
B
8
B
5
5
5
1
~
:
R 4 ~COMPLETE
DESIGNATOR IS AZR4
JI Pl
l
I
SUBASSEMBLY OF AZ
~ f--(+: ---'''<(
4 /1/(COMPLETE DESIGNATOR IS AZAI)
--1< ~ l~NUMBER
INDICATES " -
,,_ _ _ _
P1~3
42
I
DENOTE:S StE:MATIC
ON WHICH CONNECTION
I
IS MADE
PIN OF XA2 AND Pl
fPHOTO:CHOPPER
osc-1
I
~
1a
I I
WIRE COLOR: COLOR CODZTHE SAME
I ,
1
RI~
R 2
1,
AS THE RESISTOR COLOR CODE:. FIRST E:YELET OR STAND-
NUMBE:R INDICATES BASE: COLOR SECOND
I OFF
TERMINAL, MAY OR
NUMBER INDENT/FIES WIDER STRIP, AND
I
MAY NOT BE NUMBERED
I
5ftit~N&i
I
THE THIRD INDICATES THE NARROWER
I
,gP'
#'
STRIP.
(~DENOTES
WHT/REDIYEL WIRE)
I •
f9
IS AZAIRI
I
I
6
>I ~
MALE STANDJ(;
~FE:MALE
PIN
PIN CONNECTOR CONNECTOR ON
MAY OR MAY
~
A WHTIRED WIRE
NOT BE: NUMBERED
? /
"/\fi:......-"
LL
PARTIAL REFERENCE DESIGNATIONS ARE SHOWN: PREFIX WITH ASSEMBLY OR SUBASSEMBLY
DESIGNATION(S) OR BOTH FOR COMPLETE DESIGNATION
STD-B-2192
7-7