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EN 114
9.
PB52.1HU LB
9.4.6
Diagram B11A to H, STi7101 (IC7A00)
Block Diagram
ST40 core 266 MHz
16 K Icache
UDI
Int. control
MMU
32 K Dcache
CP
2 x PDES
PTI
PTI
TSmerger/router
TSIN1 TS I/O
TSIN0
NRSS-A
Circuit Descriptions, Abbreviation List, and IC Data Sheets
5 x 2-ch
S/PDIF
PCM out
DDR
SDRAM
AudioL
2-ch
AudioR
PCM in
32
32
Audio
DACs
Video
LMI
Audio decoder
and interfaces
System
ST231
LMI
core
Video decoder
FDMA
H264/MPEG-2
Clock
generator
and system
Ethernet,
services
MII/RMII
MII/RMII for 100BT
Ethernet
Figure 9-9 Internal block diagram and pin configuration
SD
video in
Serial
ATA
2x I/F
interface
SmCard
USB
Digital
6x GPIO
2.0
video input
STBus
CUR
2D gamma
blitter
ST231
core
Output stage
DVI-HDCP
HDMI
DACs
TMDS main video
Main video
output (HD)
output (HD)
YPbPr
Peripheral I/O
and external interrupts
IR
MAFE
PWM
Tx/Rx
interface
4x
3x
ILC
UARTs
SSCs
3 x GDP
DEI
Main video
Display
display
compositor
Aux video
display
DENC
DACs
Aux video
output (SD)
or companion chip
YC/CVBS
EMI
EMPI
Flash
H_16780_085.eps
070907
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