Linear Technology DC1366B Manual page 5

operation
Endpoint vs. Midspan
The LTC4266 can be configured either for endpoint or
midspan operation without software intervention by setting
the MID pin high or low respectively. (You must reset the
LTC4266 or cycle the power for the MID pin to be sensed.)
The only difference in the behavior of the LTC4266 is that
the detection back-off timer is enabled when midspan
operation is selected.
Each port can be configured individually as either endspan
2
or midspan via I C commands.
The DC1366B is wired for Alternative-A, MDI-X (power is
injected on the data pairs of the CAT5/6e cable; positive
on pins 3 and 6 of the RJ45 connector, and negative on
pins 1 and 2). The original 802.3af standard required all
midspans to use Alternative-B, but 802.3at allows midspans
to use Alternative-A.
Disconnect Sensing
The LTC4266 employs DC disconnect sensing only. For
the sake of software backward compatibility with the older
LTC4259, the LTC4266 includes register bits for enabling
AC disconnect sensing, but these bits simply enable the
DC disconnect sensing.
Pushbutton Switches
The DC1366B includes several pushbutton switches to
facilitate experimentation with the LTC4266.
The RESET button (SW6) resets all ports just as if the
n
power supplies were cycled.
The Masked Shutdown (MSD) button (SW7) will turn
n
off any ports that have their corresponding mask bit
set in the MSD register.
Each port has an individual shut down switch (SW2
n
through SW5 for ports 1 through 4 respectively).
Masked Shutdown
The MSD register can be used to pre-assign low-priority
to selected ports so they can be shut down quickly when
needed.
DEMO MANUAL DC1366B
A PSE system design can utilize the MSD feature in various
ways. For example, a PSE system may include a circuit
that monitors the V supply; if it becomes overloaded
EE
and the voltage begins to sag, the system can dump low-
priority ports by asserting the MSD pin. Shedding excess
load quickly may allow the V
reaches the UVLO threshold, thus avoiding shutting down
higher-priority ports.
2
I C Addressing
2
The 7-bit I C address of the LTC4266 is 010A
where A through A are determined by pins AD3 through
3 0
AD0 respectively. On the DC1366B these pins are controlled
by the quad DIP switch, SW1. The LTC4266 has internal
pull-up resistors on these pins, so with all four switches
of SW1 open the address will be 0101111b.
All LTC4266 chips also respond to the global address
0110000b regardless of the state of their AD3-AD0 pins.
2
I C Bus Lines
The LTC4266 has separate pins for SDAIN and SDAOUT to
facilitate the use of opto-couplers. The DC1366B provides
test points for both SDAIN and SDAOUT to make it easy to
connect to any type of breadboard or development tools.
The DC1366B ties SDAIN and SDAOUT with shunt R11.
The DC590 includes pull-up resistors on the SDA and SCL
lines, while the DC1366B board has none. If the DC590
board is replaced by a different I
make sure there are appropriate pull-up resistors on SDA
and SCL.
Interrupts
The LTC4266 includes an open-drain interrupt line for
signaling the host controller when it needs service. This
signal can be accessed on the DC1366B at the INT test
point. An LED is also included to indicate an interrupt.
Connecting Multiple DC1366B Boards
To use multiple DC1366B on a common I
connect their J6 connectors together with ribbon cable
(14-conductor, 1mm pitch).
voltage to recover before it
EE
A A A
3 2 1
2
C master, the user must
2
C bus, simply
dc1366bf
b,
0
5