State Clock Violates Overdrive Specification; Unwanted Triggers; Waiting For Trigger - HP 10314D User Manual

Intel 80386dx preprocessor interface
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"State Clock
Violates Overdrive
Specification"
Note
ti
At least one 16-channel
pod
in the state analysis measurement stored a
different number of states before trigger
than
the other pods.
This
is
usually caused by sending a clocking signal to the state analyzer that
does not meet all of the specified conditions, such as minimum period,
minimum pulse width, or minimum amplitude. Poor pulse shaping
could also cause this problem. Check the
circuitry
for the state clock
delay signal (STCLK) as described in "Slow or
Missing
Clock."
The error message "State Clock Violates Overdrive Specification"
should only occur for HP 1650A,B, HP 1652B, HP 16510A,B, and
HP 16511B Logic Analyzers with the Clock Period field set to < 60 ns.
If this error message is observed with the Clock Period set to > 60 ns,
or with the HP 16540/16541A,D, Logic Analyzer, you may have a faulty
logic analyzer. If a failure is suspected in your logic analyzer, contact
your nearest Hewlett-Packard Sales/Service Office for information on
servicing the instrument
Unwanted
Unwanted triggers can be caused by unexecuted prefetches. Add the
Triggers
prefetch queue depth to the trigger address to avoid this problem.
'Waiting for
If a trigger pattern
is
specified, this message indicates that the specified
Trigger"
trigger pattern did not occur. Verify that the triggering pattern
is
correctly set.
If a "don't care" trigger condition
is
set, this message indicates:
• For an HP 16511B Logic Analyzer, only one of the two cards
is
receiving its state
clock.
Refer to "Slow or Missing Clock."
• For an HP 1650A,B, HP 1652B, or HP 16510A,B Logic Analyzer,
the pattern duration
is
probably set to less
than ( <)
instead of
greater
than ( > ).
Since a "don't care" pattern
is
always true, the
"less than" condition
is
never satisfied. Set the trace menu
correctly for the measurement that
is
desired.
lntermment Data
This
problem is usually caused by incorrect signal levels. Adjust the
Errors
threshold level of the data pod. Use an oscilloscope to check the signal
integrity of the data lines, as needed.
HP 103140
80386DX Preprocessor Interface
Troubleshooting
A-5

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