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I
Note
II
Microprocessor
Operations Displayed:
2 "F' TTL loads plus approximately 70 pF on the following line:
LRESET
1 "F' TTL loads plus approximately 20 pF on the following lines:
CLK2,LADS
Because of capacitive loading. the HP 10314D may not be compatible
with target systems that extensively use CMOS devices.
Memory Read/Write
IJO
Read/Write
Opcode Fetch
Interrupt Acknowledge Type 0-255
Halt
Shutdown
80287 or 80387 Coprocessor Operations
Timing Analysis:
All signals are buffered except the following signals:
LNA, LERROR, PEREQ, LBUSY, INTR, NMI, and LREADY
Up to 8 ns of skew may exist between the buffered signals and the
following signals:
LNA, LERROR, PEREQ, LBUSY, INTR, NMI, and LREADY
Less
than 5
ns skew exists between buffered signals.
Power Requirements:
1.0 A at
+
5
V de
maximum,
supplied by the logic analyzer.
Logic Analyzer Required:
HP 1650A, HP 1650B, HP 1652B, HP 16510A, HP 16510B,
HP 16511B, HP 16540/16541A,D, or HP 16550A
Number of Probes Used:
General Information
3-2
Five 16-channel probes
HP 103140
80386DX Preprocessor Interface
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