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MOP-TFT320240-35A-BLM-CTB
Hardware Manual
Revision 1.0

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Summary of Contents for Matrix Orbital MOP-TFT320240-35A-BLM-CTB

  • Page 1 MOP-TFT320240-35A-BLM-CTB Hardware Manual Revision 1.0...
  • Page 2: Revision History

    Revision History Revision Date Description Author February 21, 2018 Initial Release Divino MOP-TFT320240-35A-BLM-CTB...
  • Page 3: Table Of Contents

    13.3 Static Charge Precaution .............................. 15 13.4 Packing ..................................15 13.5 Precautions during Operation ..........................15 13.6 Storage Recommendations ............................. 16 13.7 Safety Precautions ..............................16 14 Ordering ....................................17 14.1 Part Numbering Scheme ............................... 17 14.2 Options ..................................17 15 Contact ....................................17 MOP-TFT320240-35A-BLM-CTB...
  • Page 4: General Information

    The LED Life-time is defined as the estimated time to 50% degradation of initial brightness at Ta=25°C and IF =40mA. The LED lifetime could be decreased if operating IF is larger than 40mA, and increased if IF is less than 40mA. MOP-TFT320240-35A-BLM-CTB...
  • Page 5: Touch Panel Characteristics

    Active Low Default Origin Upper Left Corner Default I2C Address (Write/Read) 0xBA/0xBB Parameter Max. Unit Min. Typ. Power Voltage (VDD) Signal Voltage Signal HIGH 0.7*VDD Signal LOW 0.3*VDD Supply Current (Operation) *Note: For more information, see the GT911 datasheet. MOP-TFT320240-35A-BLM-CTB...
  • Page 6: External Dimensions

    6 External Dimensions Figure 1: MOP-TFT320240-35A-BLM-CTB Drawing MOP-TFT320240-35A-BLM-CTB...
  • Page 7: Electro-Optical Characteristics

    Instruments or compatible. For contrast ratio, Surface Luminance, Luminance uniformity and CIE, the testing data is based on TOPCON’s BM-7 or BM-5 photo detector or compatible. *Note 7: For TFT module, Gray scale reverse occurs in the direction of panel viewing angle. MOP-TFT320240-35A-BLM-CTB...
  • Page 8: Interface Description

    Serial interface date Serial interface clock SCL** Power supply of CTP *Note: Pull up resistors of 10K ohms to VDD are recommended for RST and INT. **Note: Pull up resistors of 1K-10K ohms to VDD are required for SCL and SDA. MOP-TFT320240-35A-BLM-CTB...
  • Page 9: Ac Characteristics

    DOTCLK High Period tCKH Data Setup Time Data Hold Time Reset pulse width tRES μS *Note: External clock source must be provided to DOTCLK pin of HX8238-D. The driver will not operate if absent of the clocking signal. MOP-TFT320240-35A-BLM-CTB...
  • Page 10: Data Timing

    1224 1350 tDOTCLK Vertical Back Porch tVBP Lines Vertical Front Porch tVFP Lines Vertical Data Start Point tVBP Lines Vertical Blanking Period tVBP + tVFP Lines NTSC Vertical Display VDISP 280(PALM=0) Lines Area 288(PALM=1) Vertical Cycle NTSC Vcycle Lines MOP-TFT320240-35A-BLM-CTB...
  • Page 11: Touch Panel Timing

    Register (L)* Data (1) … Data (n) Table 2: Read Operation Start A (Write) R (H) R (L) Start A (Read) D (1) … D (n) *Note: For a complete list of registers and additional information, see the GT911 datasheet. MOP-TFT320240-35A-BLM-CTB...
  • Page 12: Power Sequence

    - 1 line: 408 CLK tshut-on - 1 frame: 262 line 232.4 - DOTCLK = 6.5MHz *Note: it is necessary to input DOTCLK before the falling edge of SHUT. Display starts at 10th falling edge of VSYNC after the falling edge of SHUT MOP-TFT320240-35A-BLM-CTB...
  • Page 13: Power Down Sequence

    DOTCLK must be maintained at least 2 frames after the rising edge of SHUT. Display turns off at the 2nd falling edge of VSYNC after the falling edge of SHUT. If RESET signal is necessary for power down, provide it after the 2- frames-cycle of the SHUT period. MOP-TFT320240-35A-BLM-CTB...
  • Page 14: Inspection Criterion

    12 Inspection Criterion 12.1 Description This specification is made to be used as the standard acceptance/rejection criteria for the MOP-TFT320240-35A-BLM-CTB. 12.2 Sample plan Sampling plan according to GB/T2828.1-2003/ISO 2859-1: 1999 and ANSI/ASQC Z1.4-1993, normal level 2 and based on: Major defect: AQL 0.65 Minor defect: AQL 1.5...
  • Page 15: Lcd Pixel Defect

    1. If the fold mark and linear scar for polarizer is visible with operating condition, the defect is judged with line judge 2. If the fold mark and linear scar for polarizer is visible with non-operating condition, the defect is judged with the above judgment standard. MOP-TFT320240-35A-BLM-CTB...
  • Page 16: Handling Precautions

    If the display area is pushed hard during operation, some font may be abnormally drawn but the LCD will return to normal after it is reset.  Slight dew depositing on terminals can cause an electro-chemical reaction, damaging traces and resulting in an open circuit. Usage under the maximum operating temperature, 50%Rh or less is required MOP-TFT320240-35A-BLM-CTB...
  • Page 17: Storage Recommendations

    If any liquid leaked out of a damaged glass cell, and comes in contact with your hands, please wash it off well with soap and water MOP-TFT320240-35A-BLM-CTB...
  • Page 18: Ordering

    Table 3: Parallel TFT Part Numbering Scheme TFT 320 14.2 Options Table 4: Parallel Part Options Designator Options Product Line MOP: Matrix Orbital Parallel Display Screen Type TFT: Graphic TFT Display Columns 320: Three Hundred Twenty Pixel Columns Display Rows 240: Two Hundred Forty Pixel Rows Display Size 35: 3.5”...

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