Supermicro X7DCL-3 User Manual page 67

Advanced Chipset Control
Access the submenu to make changes to the following settings.
Warning
: Take Caution when changing the Advanced settings. An incorrect
setup, a very high DRAM frequency or an incorrect DRAM timing may cause
the system become unstable. When this occurs, reset the setting to the default
setting.
Crystal Beach Features
This feature cooperates with the Intel I/O AT (Acceleration Technology) to accelerate
the performance of TOE devices. (Note: A TOE device is a specialized, dedicated
processor that is installed on an add-on card or a network card to handle some or all
packet processing of this add-on card. For this motherboard, the TOE device is built
inside the ICH9R South Bridge chip.) The options are Enabled and Disabled.
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
4GB PCI Hole Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.
Route Port 80h Cycles to
This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.
Enabling Multi-Media Timer
Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.
USB Host Controller 1
Select Enabled to enable USB Host Controller 1. The options are Enabled and
Disabled.
USB Host Controller 2
Select Enabled to enable USB Host Controller 2. The options are Enabled and
Disabled.
Legacy USB Support
This setting allows you to enable support for Legacy USB devices. The settings
are Enabled and Disabled.
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Chapter 4: BIOS