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Supermicro X5DPA-8GG User Manual

Supermicro x5dpa-8gg motherboards: user guide
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UPER
SUPER X5DPA-8GG
USER'S MANUAL
Revision 1.0a

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Summary of Contents for Supermicro X5DPA-8GG

  • Page 1 ® UPER SUPER X5DPA-8GG USER’S MANUAL Revision 1.0a...
  • Page 2 The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product. Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not copy any part of this document.

  • Page 3: Preface

    About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the X5DPA-8GG mainboard. The X5DPA-8GG supports single or dual ® Intel 604 and 603-pin Xeon...

  • Page 4: Table Of Contents

    Checklist ... 1-1 Contacting Supermicro ... 1-2 Super X5DPA-8GG Image ... 1-3 Super X5DPA-8GG Layout ... 1-4 Super X5DPA-8GG Quick Reference ... 1-5 Motherboard Features ... 1-6 Intel E7501 Chipset: System Block Diagram ... 1-8 Chipset Overview ... 1-9 Special Features ... 1-9 ATI Graphics Controller ...
  • Page 5 Reset Button ... 2-11 Power Button ... 2-11 Power Fail Button ... 2-11 Back Panel Universal Serial Bus (USB0/1) ... 2-12 Front Panel Universal Serial Bus Headers (USB0/1) and USB2 ... 2-12 Serial Ports ... 2-13 GLAN1/2 (Ethernet Ports) ... 2-13 Fan Headers ...
  • Page 6 SUPER X5DPA-8GG User's Manual Losing the System’s Setup Configuration ... 3-2 Technical Support Procedures ... 3-2 Frequently Asked Questions ... 3-3 Returning Merchandise for Service ... 3-4 Chapter 4: BIOS Introduction ... 4-1 MainSetup ... 4-2 Advanced BIOS Setup ... 4-5 Boot Setup ...

  • Page 7: Chapter 1: Introduction

    One (1) COM Port Cable with Bracket One (1) SCSI cable (034-u320) One (1) I/O backpanel shield One (1) Supermicro CD or diskettes containing drivers and utilities One (1) User's/BIOS Manual Two (2)CPU/Heatsink Plates (SKT-120-P) and two (2) heatsink retention clips (SKT-095-604 E)

  • Page 8: Contacting Supermicro

    SUPER X5DPA-8GG User's Manual Contacting Supermicro Headquarters Address: SuperMicro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web Site: www.supermicro.com Europe Address: SuperMicro Computer B.V.

  • Page 9: Super X5Dpa-8Gg Image

    Chapter 1: Introduction Figure 1-2. SUPER X5DPA-8GG Image...

  • Page 10: Super X5Dpa-8Gg Layout

    SUPER X5DPA-8GG User's Manual Figure 1-5. SUPER X5DPA-8GG Layout* FORCE ATX PWR CONN Keyboard PW ON Mouse JP40 SSI 24PIN BK Panel USB 0/1 Serial DIMM #1A Port DIMM #1B V G A DIMM #2A DIMM #2B G L A N 1...
  • Page 11 X5DPA-8GG Quick Reference Jumper Description JBT1 CMOS Clear Pad PWR LED/Speaker Header SCSI Enable/Disable JP3,JP6 GLAN1/GLAN2 Enable/Disable VGA Enable/Disable JP37 Watch Dog (Reset NMI*) JP39 CPU Clock JP40 Force Power ON JPA1 SCSI Channel A Termination Enable/Disable JPA2 SCSI Channel B Termination Enable/Disable Open...

  • Page 12: Motherboard Features

    SUPER X5DPA-8GG User's Manual Motherboard Features • Single or dual Intel side (system) bus speed. (603-Pin Xeon supported) to the support section of our web site for a complete listing of supported processors (http:// www.supermicro.com/TechSupport.htm). M e m o r y •...
  • Page 13 Onboard I/O • Integrated ATI Rage XL graphics controller • Intel Gigabit LAN (Ethernet) 82541 controller (* two GLAN ports on the X5DPA-8GG) • 2 EIDE Ultra DMA/100 bus master interfaces • Adaptec 7902 Dual Channel Ultra 320 SCSI • 1 floppy port interface (up to 2.88 MB) •...
  • Page 14 SUPER X5DPA-8GG User's Manual LAN 1 LAN 2 66MHz PCIX100- P64H2 100MHz PCIX100- SCSI IDE PRI/ Figure 1-5. X5DPA: Intel E7501 Chipset Block Diagram Note: This is a general block diagram. Please see the previous Motherboard Features pages for details on the features of each motherboard.

  • Page 15: Chipset Overview

    I/O capability and two 64-bit PCI-X interfaces. Special Features ATI Graphics Controller The X5DPA-8GG has an integrated ATI video controller based on the Rage XL graphics chip. The Rage XL fully supports sideband addressing and AGP texturing. This onboard graphics package can provide a bandwidth of up to 512 MB/sec over a 32-bit graphics memory bus.
  • Page 16 SUPER X5DPA-8GG User's Manual 64-bit PCI/PCI-X Interface • PCI-X Rev. 1.0 Compliant 64-bit bus, up to 133MHz • Supports 64-bit addressing via Dual Address Cycle (DAC) Transactions • Compliant with PCI Power Management (PMG) Features • Supports up to four split transactions (PCI-X) •...

  • Page 17: Pc Health Monitoring

    PC Health Monitoring This section describes the PC health monitoring features of the SUPER X5DPA-8GG. All have an onboard System Hardware Monitor chip that sup- ports PC health monitoring. Onboard Voltage Monitors for the CPU Cores,+3.3V,+12V, -12V and +3.3V Standby An onboard voltage monitor will scan these voltages continuously.

  • Page 18: 1-5 Acpi Features

    SUPER X5DPA-8GG User's Manual Auto-Switching Voltage Regulator for the CPU Core The auto-switching voltage regulator for the CPU core can support up to 20A current and auto-sense voltage IDs ranging from 1.4V to 3.5V. will allow the regulator to run cooler and thus make the system more stable.

  • Page 19: Power Supply

    LAN traffic is kept to a minimum and users are not interrupted. The motherboards have a 3-pin header (WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has WOL capability.

  • Page 20: 1-7 Super I/O

    SUPER X5DPA-8GG User's Manual (*NOTES: Auxiliary 12v power (J15) is necessary to support Intel Xeon CPUs. Failure to provide this extra power will result in the CPUs becoming unstable after only a few minutes of operation. See Section 2-5 for details on connecting the power supply cables.

  • Page 21: Chapter 2: Installation

    Static-Sensitive Devices Electric-Static-Discharge (ESD) can damage electronic components. To pre- vent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions • Use a grounded wrist strap designed to prevent static discharge. •...

  • Page 22: Pga Processor And Heatsink Installation

    SUPER X5DPA-8GG User's Manual PGA Processor and Heatsink Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. Also, do not place the motherboard on a conductive surface, which can damage the BIOS battery and prevent the system from booting up.
  • Page 23 4. Secure the other retention bracket into position by repeating Step 3. 5. Lift the lever on the CPU socket: lift the lever completely and fully (*120 to 135 for Xeon CPUs as shown on right), or you will damage the CPU socket when power is applied.
  • Page 24 Notched Corner Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Make sure the location of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis.

  • Page 25: Installing Dimms

    Installing DIMMs Note: Check the Supermicro web site for recommended memory modules: http://www.supermicro.com/TECHSUPPORT/FAQs/Memory_vendors.htm Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Also note that the memory is interleaved to improve performance (see step 1).

  • Page 26: I/Oports/Control Panel Connectors

    SUPER X5DPA-8GG User's Manual To Remove: Use your thumbs to gently push near the edge of both ends of the module. This should release it from the slot. I/OPorts/Control Panel Connectors The I/O ports are color coded in conformance with the PC 99 specification.
  • Page 27 JF2 contains header pins for various buttons and indicators that are nor- mally located on a control panel at the front of the chassis. These connec- tors are designed specifically for use with Supermicro server chassis. See Figure 2-4 for the descriptions of the various control panel buttons and LED indicators.

  • Page 28: Connecting Cables

    20-pin power supply connector. Make sure that the orientation of the PS connector is correct. X5DPA-8GG has the 24-pin con- nector. See the tables on the right for pin definitions. PWR_SEC Connection In addition to the Primary ATX...

  • Page 29: Power Led

    Power LED The Power LED connection is lo- cated on pins 15 and 16 of JF2. Refer to the table on the right for pin definitions. NMI Button The non-maskable interrupt button header is located on pins 19 and 20 of JF2. Refer to the table on the right for pin definitions.

  • Page 30: Nic1 Led

    SUPER X5DPA-8GG User's Manual NIC1 LED The NIC1 (Network Interface Con- troller) LED connection is located on pins 11 and 12 of JF2. Attach the NIC1 LED cable to display net- work activity. Refer to the table on the right for pin definitions.

  • Page 31: Reset Button

    Reset Button The Reset Button connection is lo- cated on pins 3 and 4 of JF2. At- tach it to the hardware reset switch on the computer case. Refer to the table on the right for pin definitions. Power Button The Power Button connection is located on pins 1 and 2 of JF2.

  • Page 32: Back Panel Universal Serial Bus (Usb0/1)

    SUPER X5DPA-8GG User's Manual Back Panel Universal Serial Bus (USB0/1) Two Universal Serial Bus ports (J10, J11) are located beside the PS/2 keyboard/mouse ports. USB0 is the bottom connector and USB1 is the top connector. See the table on the right for pin definitions.

  • Page 33: Serial Ports

    Serial Ports The COM1(J8) serial port is lo- cated next to the USB 0/1 ports. COM 2 is located at the corner near PCI-33 Slots. (See MB layouts in Chapter 1). See the table on the right for pin definitions. COM2(J26) connector is a header on the motherboard (see pp.

  • Page 34: Fan Headers

    SUPER X5DPA-8GG User's Manual Fan Headers The X5DPA-8GG has five CPU, chassis fan headers. tions include CPU1Fan, CPU2Fan, Chassis Fan3, Chassis Fan4, and Chassis Fan5. See the table on the right for pin definitions. System Management header is located at J24. Connect the appropriate cable here to uti- lize SMB on your system.

  • Page 35: Power Led/Speaker/Nmi Header (Jd1)

    ATX PS/2 Keyboard and PS/2 Mouse Ports The ATX PS/2 keyboard and PS/2 mouse are located on J28 on the X5DPA-8GG. See the table at right for pin definitions. (See Figure 2- 3 for the locations of each.) Keyboard and PS/2 Mouse...

  • Page 36: Wake-On-Lan

    SUPER X5DPA-8GG User's Manual Wake-On-LAN The Wake-On-LAN header is des- ignated WOL1. See the table on the right for pin definitions. must enable the LAN Wake-Up set- ting in BIOS to use this feature. You must also have a LAN card with a Wake-on-LAN connector and cable.

  • Page 37: Keylock

    Keylock The keyboard lock connection is lo- cated on JP35. Utilizing this header allows you to inhibit any actions made on the keyboard, effectively "locking" it. Chassis Intrusion A Chassis Intrusion header is lo- cated at JL1. Attach the correct connector here to inform you of a chassis intrusion condition.

  • Page 38: Jumper Settings

    SUPER X5DPA-8GG User's Manual Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be used choose optional settings. create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board.

  • Page 39: Cmos Clear

    CMOS Clear JBT1 is not literally a jumper but consists of two contact pads. clear the contents of CMOS, short these pads together by touching them both with a metal conductor such as the head of a small screwdriver. For ATX power supplies, you must completely shut down the system and remove the AC power cord before clearing...

  • Page 40: Glan Enable/Disable

    SUPER X5DPA-8GG User's Manual GLAN Enable/Disable Change the setting of JP3 to enable or disable the onboard GLAN1. Change the setting of JP6 to enable or disable the onboard GLAN2. See the table on the right for jumper settings. The default setting is enabled.

  • Page 41: Front Side Bus Speed

    Front Side Bus Speed JP39 (see motherboard layout ) is used to set the system (front side) bus speed for the processors. is best to keep this jumper set to Auto. This jumper is used to- gether with the CPU Clock setting in BIOS.

  • Page 42: Scsi Enable/Disable

    SUPER X5DPA-8GG User's Manual SCSI Enable/Disable The SCSI Enable/Disable jumper at JA4 allows you to enable or dis- able the onboard SCSI. The nor- mal (default) position is on pins 1- 2 to enable SCSI. See the table on the right for jumper settings.

  • Page 43: Force-Power-On Enable/Disable

    Force-Power-On Enable/ Disable Jumper JP40 allow you to enable or disable the function of Force- Power-On. If enabled, the power will always stay on automatically. If this function disabled, the user needs to press the power button to power on the system. Onboard Indicators GLAN1/GLAN2 LEDs The Ethernet ports (located beside...

  • Page 44: Ipmi Socket

    A, and the connector that does not have twisted wires always connects to drive B. IPMI J22 is designated as the IPMI Socket for the X5DPA-8GG Moth- erboard. Floppy Connector The floppy connector is located on JP7.

  • Page 45: Scsi Connectors

    Ultra320 SCSI Connectors Refer to the table below for the pin definitions of the Ultra320 SCSI connectors located at JA1 and JA2. Connector Contact Number SCSI Connectors 68-pin Ultra320 SCSI Connectors (JA1 and JA2) Connector Contact Signal Names Number +DB(12) +DB(13) +DB(14) +DB(15)

  • Page 46: Ide Connectors

    SUPER X5DPA-8GG User's Manual IDE Connectors There are no jumpers to configure onboard IDE#1(J2) and IDE#2 (J3) connectors. See the table on the right for pin defini- tions. FORCE Keyboard PW ON Mouse SSI 24PIN JP40 BK Panel USB 0/1...

  • Page 47: Chapter 3: Troubleshooting

    Troubleshooting Procedures Use the following procedures to troubleshoot your system. followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.

  • Page 48: Memory Errors

    SUPER X5DPA-8GG User's Manual If you are a system integrator, VAR or OEM, a POST diagnos- tics card is recommended. For I/O port 80h codes, refer to Memory Errors 1. Make sure the DIMM modules are properly and fully installed.

  • Page 49: Frequently Asked Questions

    Question: What are the various types of memory that my mother- board can support? Answer: The X5DPA-8GG has four DIMM slots that support 184-pin, regis- tered ECC DDR-266 or DDR-200 SDRAM DIMM modules. If using 533 MHz processors, you must use DDR-266 memory (DDR-200 is not supported at a 533 MHz front side bus speed).

  • Page 50: Returning Merchandise For Service

    SUPER X5DPA-8GG User's Manual site. Also, check the current BIOS revision and make sure it is newer than your BIOS before downloading. Question: What's on the CD that came with my motherboard? Answer: The supplied compact disc has quite a few drivers and programs that will greatly enhance your system.

  • Page 51: Introduction

    When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it. (*Note: AMIBIOS has default text messages built in. Supermicro retains the option to include, omit, or change any of these text messages.) The AMI BIOS setup/utility uses a key-based navigation system called hot keys.

  • Page 52: 4-2 Main Setup

    UPER X5DPA-8GG User’s Manual 4-2 Main Setup When you first enter the BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS Setup screen is shown below.
  • Page 53 ! ! ! ! ! Primary IDE Master/Slave, Secondary IDE Master/Slave Sub Menu ! ! ! ! ! Primary and Secondary IDE Master and Slave Settings From the Main Setup screen, press <Enter> to access the sub menu for the primary and secondary IDE master and slave drives.
  • Page 54 UPER X5DPA-8GG User’s Manual Block (Multi-Sector Transfer) Block mode boosts IDE drive performance by increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if block mode is not used. Block mode allows transfers of up to 64 KB per interrupt.

  • Page 55: Advanced Bios Setup

    Chapter 4: AMIBIOS S.M.A.R.T. For Hard disk drives Self-Monitoring Analysis and Reporting Technology (SMART) can help pre- dict impending drive failures. Select "Auto" to allow BIOS to auto detect hard disk drive support. Select "Disabled" to prevent the BIOS from using the S.M.A.R.T.

  • Page 56: Boot Settings Configuration

    UPER X5DPA-8GG User’s Manual ! ! ! ! ! BIOS Features !Boot Settings Configuration This item allows the user to configure the system's boot settings. Quick Boot The default setting is "Enabled". Select "Disabled" to allow the BIOS to perform all POST tests. Select "Enabled to allow the BIOS to skip certain POST tests to reduce the time needed for the system to boot up.
  • Page 57 Chapter 4: AMIBIOS Bootup Num-Lock Set this value to allow the Number Lock setting to be modified during boot up. The default setting is "On." The options are "On" and "Off". PS/2 Mouse Support Set this value to allow the PS/2 mouse support to be modified. The default setting is Enabled.
  • Page 58 UPER X5DPA-8GG User’s Manual ACPI APIC Support Select "Enabled" to allow the ACPI APIC Table Pointer to be included in the RSDP pointer list. The options are "Enabled", and "Disabled". AMI OEMB Table Select "Enabled" to allow the OEMB Table Pointer to be included in the R(x)SDT pointer lists.

  • Page 59: Pci/Pnp Configuration

    Chapter 4: AMIBIOS Keyboard Clock Setting Select "Enabled" to allow the user set the keyboard clock Setting. The op- tions are "Enabled", and "Disabled" ! ! ! ! ! System Frequency Display This feature allows the BIOS to display the status, and the frequency of Front Side Bus, Memory and PCI slots.
  • Page 60 UPER X5DPA-8GG User’s Manual PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering. Select "Enabled" to allow the BIOS to use PCI busmaster for reading and writing to IDE drives. The options are "Disabled" and "Enabled".

  • Page 61: Advanced Chipset Control

    Select "Available" to allow the specified DMA to be used by PCI/PnP device. Select "Reserved" to allow the specified DMA to be used by a legacy ISA device. The options are "Available" and "Reserved". DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6...
  • Page 62 UPER X5DPA-8GG User’s Manual !Intel ICH3 SouthBridge Configuration This feature allows the user to configure the settings for Intel ICH3 SouthBridge chipset. ICH3 Dev31 Func1, IDE Select "Enabled" to enable the ICH3 IDE Controller. The options are "En- abled" and "Disabled."...
  • Page 63 Chapter 4: AMIBIOS ICH3 DMA Collection Select "Enabled" to enable the DMA Collection buffer. The options are "En- abled" and "Disabled." DMA Type Select the type of DMA performed on this channel. The options are "LPC DMA" and "PC/PCI". DMA-0 Type DMA-1 Type DMA-2 Type DMA-3 Type...

  • Page 64: Usb Configuration

    UPER X5DPA-8GG User’s Manual ! ! ! ! ! USB Configuration This feature allows the user to configure USB settings. Legacy USB Support Select "Enabled" to enable the support for USB Legacy. The options are "Disabled", and "Enabled." ! ! ! ! !
  • Page 65 Chapter 4: AMIBIOS Parallel Port Address This option specifies the I/O address used by the parallel port. Select "Disabled" to prevent the parallel port from accessing any system re- sources. When the value of this option is set to "Disabled", the printer port becomes unavailable.

  • Page 66: Dmi Event Logging

    UPER X5DPA-8GG User’s Manual !Processor & Clock Options Hyper Threading Select "Enabled" to enabled the function of Hyper Threading for HT supported processor(s). The Options are "Enabled" or "Disabled." Ratio CMOS Setting This feature allows the user to set the ratio between CPU Core Clock and the FSB Frequency.
  • Page 67 Chapter 4: AMIBIOS Serial Port Mode Select the baud rate you want the serial port to use for console redirection. Select "115200 8,n,1" to select 115200 as the baud rate (transmitted bits per second) of the serial port. Select "57600 8,n,1" to set 57600 as the baud rate (transmitted bits per second) of the serial port.

  • Page 68: Boot Settings

    UPER X5DPA-8GG User’s Manual Boot Settings Boot Settings Configuration Use this screen to select options for the Boot Settings Configuration. The settings are described on the following pages. The screen is shown below. Boot Device Priority This feature allows the user to specify the sequence of priority for the Boot Device.

  • Page 69: Removable Drives

    1st Drive Specify the boot sequence for 1st Hard Drive. The Options are "PM- ST340016A" and "Disabled". Removable Drives This feature allows the user to specify the Boot sequence from available Removable Drives. 1st Drive Specify the boot sequence for 1st Removable Drive. The Options are "1st Floppy Drive"...

  • Page 70: Security Setup

    UPER X5DPA-8GG User’s Manual Security Settings AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first. Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then, type in the password.

  • Page 71: Exit Options

    Chapter 4: AMIBIOS Exit Options Select the Exit tab from the BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit When you have completed the system configuration changes, select this option to leave BIOS Setup and reboot the computer, so the new system configuration parameters can take effect.
  • Page 72 UPER X5DPA-8GG User’s Manual Load Optimal Defaults To set this feature, select Load Optimal Defaults from the Exit menu and press <Enter>. Then, Select "OK" to allow BIOS to automatically load Optimal Defaults to BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.
  • Page 73 BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen.
  • Page 74 UPER X5DPA-8GG User’s Manual Notes...
  • Page 75 BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
  • Page 76 UPER X5DPA-8GG User’s Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard floppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
  • Page 77 initialization before the keyboard BAT command is issued. The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller. The keyboard controller BAT command result has been verified. Next, performing any necessary initialization after the keyboard controller BAT command test.
  • Page 78 UPER X5DPA-8GG User’s Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next.
  • Page 79 Checkpoint Code Description Patterns written in base memory. Determining the amount of memory below 1 MB next. The amount of memory below 1 MB has been found and verified. Determining the amount of memory above 1 MB memory next. The amount of memory above 1 MB has been found and verified. Checking for a soft reset and clearing the memory below 1 MB for the soft reset next.
  • Page 80 UPER X5DPA-8GG User’s Manual Checkpoint Code Description The DMA page register test passed. Performing the DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next.
  • Page 81 Checkpoint Code Description Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional information. Initializing before passing control to the adaptor ROM at C800. Initialization before the C800 adaptor ROM gains control has com- pleted.
  • Page 82 UPER X5DPA-8GG User’s Manual Notes...
  • Page 83 C-1 Installing Windows Operating System After all the hardware has been installed, you must first install the operating system, and then, other software drivers. The necessary drivers are all included on the Supermicro CDs that came packaged with your motherboard. Driver/Tool Installation Display Screen (*Note: Click the icons showing a hand writing on paper to view the readme files for each item.
  • Page 84 UPER X5DPA-8GG User's Manual C-2 Supero Doctor III The Supero Doctor III program is a Web base management tool that supports remote management capability. It includes Remote and Local Management tools. The local management is called SD III Client. The...
  • Page 85 Supero Doctor III Interface Display Screen-II (Remote Control) (*Note: SD III Software Revision 1.0 can be downloaded from our Website at: ftp://ftp.supermicro.com/utility/Supero_Doctor_III/. You can also download SDIII User's Guide at: http://www.supermicro.com/PRODUCT/ Manuals/SDIII/UserGuide.pdf. For Linux, we will still recommend Supero Doctor II.)
  • Page 86 UPER X5DPA-8GG User's Manual Notes...

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