Page 1
UPER ® SUPER X5DPA-G SUPER X5DPA-GG USER’S MANUAL Revision 1.0b...
Page 2
The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product. Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not copy any part of this document.
This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER X5DPA-G/X5DPA-GG mainboard. X5DPA-GG supports single or dual Intel sors at up to 3.06 GHz at a 533/400 MHz front side bus. Please refer to the...
Contacting Supermicro ... 1-2 Super X5DPA-G Image ... 1-4 Super X5DPA-GG Image ... 1-5 Super X5DPA-G Layout ... 1-6 Super X5DPA-G Quick Reference ... 1-7 Super X5DPA-GG Layout ... 1-8 Super X5DPA-GG Quick Reference ... 1-9 Motherboard Features ... 1-10 Intel E7501 Chipset: System Block Diagram ...
Page 5
NIC1 LED ... 2-9 NIC2 LED ... 2-9 Overheat LED ... 2-9 Power Fail Button ... 2-9 Reset Button ... 2-10 Power Button ... 2-10 Chassis Intrusion ... 2-10 Back Panel Universal Serial Bus (USB0/1) ... 2-10 Front Panel Universal Serial Bus Headers (USB0/1) and USB2 ... 2-11 Serial Ports ...
Page 6
SUPER X5DPA-G/X5DPA-GG User's Manual Losing the System’s Setup Configuration ... 3-2 Technical Support Procedures ... 3-2 Frequently Asked Questions ... 3-3 Returning Merchandise for Service ... 3-5 Chapter 4: BIOS Introduction ... 4-1 MainSetup ... 4-2 Advanced BIOS Setup ... 4-5 Boot Setup ...
One (1) USB cable One (1) COM Port Cable with Bracket One (1) I/O backpanel shield One (1) Supermicro CD or diskettes containing drivers and utilities One (1) User's/BIOS Manual Two (2)CPU/Heatsink Plates (SKT-120-P) and two (2) heatsink retention clips (SKT-095-604 E)
SUPER X5DPA-G/X5DPA-GG User's Manual Figure 1-3. SUPER X5DPA-G Layout* FORCE Keyboard PW ON Mouse JP40 SSI 24PIN BKPanel USB 0/1 Serial Port V G A Chassis GLAN1 Fan5 INTEL RC8254X 100 MHz PCI-X #1 100 MHz PCI-X #2 Pin 1...
Page 13
X5DPA-G Quick Reference Jumper Description JBT1 CMOS Clear PWR LED/Speaker Header GLAN1 Enable/Disable VGA Enable/Disable JP37 Watch Dog (Reset/NMI) JP39 CPU Clock JP40 Force Power On Connector Description ATX PWR CONN Primary ATX Power Connector DIMM#1A-DIMM#2B Memory (RAM) Slots CPU/CHASSIS FANS CPU/Chassis Fan Headers...
SUPER X5DPA-G/X5DPA-GG User's Manual Figure 1-3. SUPER X5DPA-GG Layout* FORCE ATX PWR CONN Keyboard PW ON Mouse JP40 SSI 24PIN BK Panel USB 0/1 DIMM #1A Serial DIMM #1B Port DIMM #2A V G A DIMM #2B Chassis G L A N 1...
Page 15
X5DPA-GG Quick Reference Jumper Description JBT1 CMOS Clear PWR LED/Speaker Header GLAN1 Enable/Disable GLAN2 Enable/Disable VGA Enable/Disable JP37 Watch Dog (Reset/NMI*) JP39 CPU Clock JP40 Force Power ON Connector Description ATX PWR CONN Primary ATX Power Connector DIMM#1A-DIMM#2B Memory (RAM) Slots CPU/Chassis FAN CPU/Chassis Fan Headers (5) LAN1...
SUPER X5DPA-G/X5DPA-GG User's Manual Motherboard Features • Single or dual Intel 533/400 MHz front side (system) bus speed. (603-Pin Xeon supported) Note: Please refer to the support section of our web site for a complete listing of supported processors (http://www.supermicro.com/TechSupport.htm).
Page 17
• Integrated ATI Rage XL graphics controller • Intel Gigabit LAN (Ethernet) 8254X controller (* two GLAN ports on X5DPA-GG, one GLAN port on X5DPA-G) • 2 EIDE Ultra DMA/100 bus master interfaces • 1 floppy port interface (up to 2.88 MB) •...
Page 18
SUPER X5DPA-G/X5DPA-GG User's Manual LAN 1 LAN 2 66MHz PCIX100- P64H2 100MHz PCIX100- IDE PRI/ Figure 1-5. X5DPA: Block Diagram Note: This is a general block diagram. Please see the previous Motherboard Features pages for details on the features of each motherboard.
I/O capability and two 64-bit PCI-X interfaces. Special Features ATI Graphics Controller The X5DPA-G/X5DPA-GG has an integrated ATI video controller based on the Rage XL graphics chip. The Rage XL fully supports sideband address- ing and AGP texturing. This onboard graphics package can provide a band- width of up to 512 MB/sec over a 32-bit graphics memory bus.
SUPER X5DPA-G/X5DPA-GG User's Manual PC Health Monitoring This section describes the PC health monitoring features of the SUPER X5DPA-G/X5DPA-GG. All have an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU Cores,+3.3V,+12V, -12V and +3.3V Standby...
CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS. This allows the user to define an overheat tempera- ture. When this temperature is exceeded, both the overheat buzzer and the warning LED are triggered.
LAN traffic is kept to a minimum and users are not interrupted. The motherboards have a 3-pin header (WOL) to connect to the 3-pin header on In case the system malfunctions and...
It is even more important for processors that have high CPU clock rates. The SUPER X5DPA-G/X5DPA-GG accommodates ATX power supplies. Al- though most power supplies generally meet the specifications required by the CPU, some are inadequate. You should use one that will supply at least...
Page 24
SUPER X5DPA-G/X5DPA-GG User's Manual drives. The Super I/O supports 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication ports (UARTs), one of which supports serial infrared communication.
Static-Sensitive Devices Electric-Static-Discharge (ESD) can damage electronic components. To pre- vent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions • Use a grounded wrist strap designed to prevent static discharge. •...
SUPER X5DPA-G/X5DPA-GG User's Manual PGA Processor and Heatsink Installation When handling the processor package, avoid placing direct pressure on the label area of the fan. Also, do not place the motherboard on a conductive surface, which can damage the BIOS battery and prevent the system from booting up.
Page 27
line up the mounting holes on the bracket against the mounting holes on the motherboard. Secure the Reten- tion Bracket (on the front) and the Retention Plate (on the back) by putting screws through the mounting holes. Repeat this step for the second Retention Bracket.
Page 28
Notched Corner Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis. Make sure the location of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis.
Installing DIMMs Note: Check the Supermicro web site for recommended memory modules: http://www.supermicro.com/TECHSUPPORT/FAQs/Memory_vendors.htm Exercise extreme care when installing or removing DIMM modules to prevent any possible damage. Also note that the memory is interleaved to improve performance (see step 1).
SUPER X5DPA-G/X5DPA-GG User's Manual To Remove: Use your thumbs to gently push near the edge of both ends of the module. This should release it from the slot. I/OPorts/Control Panel Connectors The I/O ports are color coded in conformance with the PC 99 specification.
JF2 contains header pins for various buttons and indicators that are nor- mally located on a control panel at the front of the chassis. These connec- tors are designed specifically for use with Supermicro server chassis. See Figure 2-4 for the descriptions of the various control panel buttons and LED indicators.
SUPER X5DPA-G/X5DPA-GG User's Manual Connecting Cables ATX Power Connection The X5DPA-G/X5DPA-GG supply connector meets the SSI (Superset ATX) 24-pin specifica- tion, however it also supports a 20-pin power supply connector. Make sure that the orientation of the PS connector is correct.
HDD LED The HDD LED (for IDE and SCSI Disk Drives) connection is located on pins 13 and 14 of JF2. Attach the IDE hard drive LED cable to these pins to display disk activity. Refer to the table on the right for pin definitions.
SUPER X5DPA-G/X5DPA-GG User's Manual Reset Button The Reset Button connection is lo- cated on pins 3 and 4 of JF2. At- tach it to the hardware reset switch on the computer case. Refer to the table on the right for pin definitions.
Front Panel USB 0/1 & USB 2 Three Front Panel USB Headers (JD2, J22) can be used for front side USB access. These USB headers are located next to the Floppy Disk Connector. You will need a USB cable (not included) to use either connection.
SUPER X5DPA-G/X5DPA-GG User's Manual Fan Headers The X5DPA-G/X5DPA-GG has five CPU, chassis fan headers. Desig- nations include CPU Fan1, CPU Fan2, Chassis Fan 3, Chassis Fan4, and Chassis Fan 5. See the table on the right for pin defini- tions.
Wake-On-LAN The Wake-On-LAN header is des- ignated WOL1. See the table on the right for pin definitions. must enable the LAN Wake-Up set- ting in BIOS to use this feature. You must also have a LAN card with a Wake-on-LAN connector and cable.
SUPER X5DPA-G/X5DPA-GG User's Manual Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be used choose optional settings. create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board.
GLAN Enable/Disable (*GLAN2 is for X5DPA-GG only) Change the setting of JP3 to enable or disable the onboard GLAN1. Change the setting of JP6 to enable or disable the onboard GLAN2 *X5DPA-GG only). See the table on the right for jumper settings. The default setting is enabled VGA Enable/Disable JP4 allows you to enable or disable...
SUPER X5DPA-G/X5DPA-GG User's Manual Onboard Indicators GLAN1/GLAN2 LEDs is for X5DPA-GG Only) The Ethernet ports (located beside the VGA port) have two LEDs. See the table on the right for the functions associated with these LEDs. On each GLAN port, the...
Floppy/Hard Disk Drive, Parallel Port, and IPMI Connections (*Parallel Port: X5DPA-G, IPMI: X5DPA-GG) Note the following when connecting the floppy and hard disk drive cables: • The floppy disk drive cable has seven twisted wires. • A red mark on a wire typically designates the location of pin 1.
SUPER X5DPA-G/X5DPA-GG User's Manual Floppy Connector The floppy connector is located on JP7. See the table below for pin definitions. IDE Connectors There are no jumpers to configure onboard IDE#1(J2) and IDE#2 (J3) connectors. See the table on the right for pin defini- tions.
Chapter 2: Installation Installing Software Drivers After all the hardware has been installed, you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. After inserting this CD into your CDROM drive, the display shown in Figure 2-5 should appear.
Page 44
SUPER X5DPA-G/X5DPA-GG User's Manual Notes 2-20...
Troubleshooting Procedures Use the following procedures to troubleshoot your system. followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.
SUPER X5DPA-G/X5DPA-GG User's Manual If you are a system integrator, VAR or OEM, a POST diagnos- tics card is recommended. For I/O port 80h codes, refer to Memory Errors 1. Make sure the DIMM modules are properly and fully installed.
Question: What are the various types of memory that my mother- board can support? Answer: The X5DPA-G/X5DPA-GG has four DIMM slots that support 184- pin, registered ECC DDR-266 or DDR-200 SDRAM DIMM modules. If using 533 MHz processors, you must use DDR-266 memory (DDR-200 is not sup- ported at a 533 MHz front side bus speed).
Page 48
Answer: It is recommended that you do not upgrade your BIOS if you are experiencing no problems with your system. Updated BIOS files are located on our web site at http://www.supermicro.com. Please check our BIOS warning message and the info on how to update your BIOS on our web site.
Chapter 3: Troubleshooting Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number.
Page 50
SUPER X5DPA-G/X5DPA-GG User's Manual Notes...
Chapter 4 AMIBIOS Introduction This chapter describes the AMIBIOS for the X5DPA-G/X5DPA-GG. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based program. This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.
UPER X5DPA-G/X5DPA-GG User’s Manual 4-2 Main Setup When you first enter the BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS Setup screen is shown below.
Page 53
Primary IDE Master/Slave, Secondary IDE Master/Slave Sub Menu Primary and Secondary IDE Master and Slave Settings From the Main Setup screen, press <Enter> to access the sub menu for the primary and secondary IDE master and slave drives. Use this screen to select options for the Primary and Secondary IDE drives.
Page 54
UPER X5DPA-G/X5DPA-GG User’s Manual Block (Multi-Sector Transfer) Block mode boosts IDE drive performance by increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if block mode is not used. Block mode allows transfers of up to 64 KB per interrupt.
Chapter 4: AMIBIOS Select UDMA1 to allow the BIOS to use Ultra DMA mode 1. It has a data transfer rate of 25 MBs. Select UDMA2 to allow the BIOS to use Ultra DMA mode 2. It has a data transfer rate of 33.3 MBs. The Options are "Auto", "SWDMA0", "SWDMA1", "SWDMA2",...
UPER X5DPA-G/X5DPA-GG User’s Manual BIOS Features Boot Settings Configuration This item allows the user to configure the system's boot settings. Quick Boot The default setting is "Enabled". Select "Disabled" to allow the BIOS to perform all POST tests. Select "Enabled to allow the BIOS to skip certain POST tests to reduce the time needed for the system to boot up.
PS/2 Mouse Support Set this value to allow the PS/2 mouse support to be modified. The default setting is Enabled. The options are "Enabled" and "Disabled". Wait for ‘F1’ If Error Select Enable to activate the function of Wait for "F1" if Error. The options are "Enabled"...
Page 58
UPER X5DPA-G/X5DPA-GG User’s Manual AMI OEMB Table Select "Enabled" to allow the OEMB Table Pointer to be included in the R(x)SDT pointer lists. The options are "Enabled", and "Disabled". Headless Mode Select "Enabled" to activate the Headless Operation Mode through ACPI. The options are "Enabled", and "Disabled".
Chapter 4: AMIBIOS PCI/PnP Configuration Plug & Play O/S Select "Yes" to allow the operating system to configure Plug & Play devices that are not required when booting up the system, if the function of Plug & Play is supported by the OS. Select "No"...
Page 60
UPER X5DPA-G/X5DPA-GG User’s Manual Set this value to allow the IRQ settings to be modified. The default setting is "Available". Select "Available" to allow the specified IRQ to be used by a PCI/PnP device. The options are "Available" and "Reserved" for the following IRQs.
Reserved Memory Size This item allows the system to reserve memory that is used by ISA devices. Select "Disabled" to prevent BIOS from reserving memory to ISA devices. Select "16K" to allow the system to reserve 16K of the system memory for the ISA devices.
Page 62
UPER X5DPA-G/X5DPA-GG User’s Manual ICH3 Dev29 Func1, USB#2 Select "Enabled" to enable the ICH3 USB Host Controller#2. The options are "Disabled" and "Enabled." ICH3 Dev29 Func2, USB#3 Select "Enabled" to enable the ICH3 USB Host Controller#3. The options are "Disabled" and "Enabled."...
Intel PCI-64 Hub 2 Configuration This feature allows the user to configure the settings for Intel PCI-64 Hub2 PCIHub chipset. HotPlug Inhibit Bus Connect Select "Enabled" to enable the function of "Inhibit Bus Connect Status" in HotPlug Controller. The options are "Enabled" and "Disabled." PCI Slot1 &...
UPER X5DPA-G/X5DPA-GG User’s Manual Select "3F8/IRQ4" to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. The options are "Disabled", "3F8/IRQ4", "3E8/IRQ4", "2E8/IRQ3". Serial Port2 Address This option specifies the base I/O port address and Interrupt Request ad- dress of serial port 2.
Page 65
Processor & Clock Options HyperThreading Select "Enabled" to enabled the function of HyperThreading for HT supported processor(s). The Options are "Enabled" or "Disabled." Ratio CMOS Setting This feature allows the user to set the ratio between CPU Core Clock and the FSB Frequency. The default setting is "8". Spread Spectrum Select "Enabled"...
Page 66
UPER X5DPA-G/X5DPA-GG User’s Manual Serial Port Number Select the serial port you want to use for console redirection. You can set the value for this option to either "COM1" or "COM2". Serial Port Mode Select the baud rate you want the serial port to use for console redirection.
Boot Settings Boot Settings Configuration Use this screen to select options for the Boot Settings Configuration. The settings are described on the following pages. The screen is shown below. Boot Device Priority This feature allows the user to specify the sequence of priority for the Boot Device.
UPER X5DPA-G/X5DPA-GG User’s Manual 1st Drive Specify the boot sequence for 1st Hard Drive. The Options are "PM- ST340016A" and "Disabled". Removable Drives This feature allows the user to specify the Boot sequence from available Removable Drives. 1st Drive Specify the boot sequence for 1st Removable Drive. The Options are "1st Floppy Drive"...
Chapter 4: AMIBIOS Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then, type in the password. Change User Password Select this option and press <Enter> to access the sub menu, and then, type in the password. Clear User Password Select this option and press <Enter>...
Page 70
UPER X5DPA-G/X5DPA-GG User’s Manual Save Changes and Exit When you have completed the system configuration changes, select this option to leave BIOS Setup and reboot the computer, so the new system configuration parameters can take effect. Select Save Changes and Exit from the Exit menu and press <Enter>.
BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen.
Page 73
BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
Page 74
UPER X5DPA-G/X5DPA-GG User’s Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard floppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
Page 75
initialization before the keyboard BAT command is issued. The keyboard controller input buffer is free. Next, issuing the BAT command to the keyboard controller. The keyboard controller BAT command result has been verified. Next, performing any necessary initialization after the keyboard controller BAT command test.
Page 76
UPER X5DPA-G/X5DPA-GG User’s Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next.
Page 77
Checkpoint Code Description Patterns written in base memory. Determining the amount of memory below 1 MB next. The amount of memory below 1 MB has been found and verified. Determining the amount of memory above 1 MB memory next. The amount of memory above 1 MB has been found and verified. Checking for a soft reset and clearing the memory below 1 MB for the soft reset next.
Page 78
UPER X5DPA-G/X5DPA-GG User’s Manual Checkpoint Code Description The DMA page register test passed. Performing the DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next.
Page 79
Checkpoint Code Description Initializing the bus option ROMs from C800 next. See the last page of this chapter for additional information. Initializing before passing control to the adaptor ROM at C800. Initialization before the C800 adaptor ROM gains control has com- pleted.