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Schematic Diagrams
Processor 4/6
D
VCCIN
CPU
C224
Sheet 5 of 69
Processor 4/6
C
CPU
VCCIN
CPU
C355
B
CPU
A
B - 6 Processor 4/6
5
4
VCCIN
VCORE 10uF x 25
VCORE 47uF x 10
VDDQ
VCORE 220uF x 4
VDDQ 22uF x 2
10uF x 1
Plaseholer x 2 (0603)
C347
C208
C203
C207
C353
C354
C177
C249
C303
VDDQ
C350
C348
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
C165
C167
C206
CPU
CPU
Close to Via
CPU
CPU
CPU
C240
C358
C222
C220
C223
C239
C310
C329
C264
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
C241
C204
VCCIN
CPU
CPU
C155
C156
C146
VCCIN
+
+
+
C297
C295
C296
C278
C274
C267
CPU
CPU
CPU
Power swap with Page 59
Bryan
0218
CPU
CPU
CPU
CPU
CPU
CPU
VCCIN
VCCIN
C277
C265
C266
C248
CPU
R567
VCCIN_SENSE_R
CPU
R559
VSSIN_SENSE_R
CPU
R554
CPU
R548
CPU
CPU
CPU
CPU
5
4
3
4.3A
VDDQ
VCCIN
U41N
14 OF 15
L15
AH11
AB11
VSS_572
VDD2_1
L18
AH12
AC11
VSS_573
VDD2_2
L2
AJ11
AC12
VSS_574
VDD2_3
L22
AJ12
AD11
VSS_575
VDD2_4
L26
AL11
AD12
VSS_576
VDD2_5
L29
AM11
AV33
VSS_577
VDD2_6
L33
AM12
AV34
VSS_578
VDD2_7
L35
AN11
AV35
VSS_579
VDD2_8
L36
AN12
AW34
VSS_580
VDD2_9
L38
AR11
BA34
VSS_581
VDD2_10
L5
AR5
BA35
VSS_582
VDD2_11
L7
AT11
BB34
VSS_583
VDD2_12
M33
AT12
BD33
VSS_584
VDD2_13
M36
AT5
BD34
VSS_585
VDD2_14
M40
AV10
BE34
VSS_586
VDD2_15
N1
AV11
BE35
VSS_587
VDD2_16
N10
AW10
BG34
VSS_588
VDD2_17
N13
AW11
BG35
VSS_589
VDD2_18
N17
AW12
BH33
VSS_590
VDD2_19
N20
AW5
BH34
VSS_591
VDD2_20
N24
AY11
BH35
VSS_592
VDD2_21
N28
AY5
BJ34
C351
C345
C346
VSS_593
VDD2_22
N3
BA11
BJ35
VSS_594
VDD2_23
N31
BC10
BK34
VSS_595
VDD2_24
N33
BC11
BK35
VSS_596
VDD2_25
N35
BC12
BL33
VSS_597
VDD2_26
N37
BD10
BL34
VSS_598
VDD2_27
N38
BD11
BL35
VSS_599
VDD2_28
N4
BD5
BN34
VSS_600
VDD2_29
N5
BE11
BN35
VSS_601
VDD2_30
N6
BE5
BP34
VSS_602
VDD2_31
N8
BF11
BP35
VSS_603
VDD2_32
CPU
CPU
CPU
N9
BF12
BR33
VSS_604
VDD2_33
P10
BG10
BR34
VSS_605
VDD2_34
P11
BG11
BR35
VSS_606
VDD2_35
P15
BH10
BT11
VSS_607
VDD2_36
P18
BH5
BT34
VSS_608
VDD2_37
P2
BK5
BT35
VSS_609
VDD2_38
P22
BM10
BU34
VSS_610
VDD2_39
P26
BN10
BU35
VSS_611
VDD2_40
P29
BN5
BV11
VSS_612
VDD2_41
P33
BP5
BV12
VSS_613
VDD2_42
P35
BT10
BV33
VSS_614
VDD2_43
P38
BV10
BW11
VSS_615
VDD2_44
P41
BV5
BW12
VSS_616
VDD2_45
P5
BW5
BW33
VSS_617
VDD2_46
P7
BW34
VSS_618
R10
V37
BW35
VSS_619
VSS_652
R18
V39
BY12
VSS_620
VSS_653
R2
V4
BY34
VSS_621
VSS_654
R33
V40
BY35
VSS_622
VSS_655
R34
V41
CA14
VSS_623
VSS_656
R36
V5
CA16
VSS_624
VSS_657
R39
V6
CA18
VSS_625
VSS_658
R5
V8
CA20
VSS_626
VSS_659
R7
V9
CA22
VSS_627
VSS_660
T20
W10
CA23
VSS_628
VSS_661
T22
W2
CA25
VSS_629
VSS_662
T24
W22
CA27
VSS_630
VSS_663
T28
W5
CA30
VSS_631
VSS_664
T31
W7
CA31
VSS_632
VSS_665
U10
Y10
CB12
VSS_633
VSS_666
U13
Y17
CB13
VSS_634
VSS_667
U15
Y2
CB14
VSS_635
VSS_668
U17
Y22
CB16
VSS_636
VSS_669
U2
Y26
CB17
VSS_637
VSS_670
U22
Y31
CB18
VSS_638
VSS_671
U26
Y5
CB20
VSS_639
VSS_672
U29
Y7
CB21
VSS_640
VSS_673
C171
U35
CB22
VSS_641
U38
CB23
VSS_642
U41
CB24
VSS_643
U5
CB25
VSS_644
+
U7
CB27
VSS_645
V1
CB28
VSS_646
V10
VSS_647
V11
VSS_648
CPU
V22
VSS_649
V3
VSS_650
V36
VSS_651
TGL_H_CPU_IP_EXT
VCCIN_AUX
100_1%_04
CPU
R90
0_04
VCCIN_AUX_SENSE_R
CPU
R93
VCCIN_SENSE
58
0_04
VSSIN_AUX_SENSE_R
CPU
R95
VSSIN_SENSE
58
100_1%_04
CPU
R97
3
2
1
105A
VCCIN
VCCIN
VCCIN
U41J
U41K
10 OF 15
11 OF 15
CB30
CG16
CN30
VCCIN_140
VCCIN_215
VCCIN_1
VCCIN_73
CB31
CG17
CN31
VCCIN_141
VCCIN_216
VCCIN_2
VCCIN_74
CB33
CG18
CN33
VCCIN_142
VCCIN_217
VCCIN_3
VCCIN_75
CB34
CG20
CN34
VCCIN_143
VCCIN_218
VCCIN_4
VCCIN_76
CB35
CG21
CN35
VCCIN_144
VCCIN_219
VCCIN_5
VCCIN_77
CC12
CG22
CN36
VCCIN_145
VCCIN_220
VCCIN_6
VCCIN_78
CC13
CG23
CN38
VCCIN_146
VCCIN_221
VCCIN_7
VCCIN_79
CC14
CG24
CN39
VCCIN_147
VCCIN_222
VCCIN_8
VCCIN_80
CC16
CG25
CN40
VCCIN_148
VCCIN_223
VCCIN_9
VCCIN_81
CC17
CG27
CN41
VCCIN_149
VCCIN_224
VCCIN_10
VCCIN_82
CC18
CG28
CP28
VCCIN_150
VCCIN_225
VCCIN_11
VCCIN_83
CC20
CG30
CP30
VCCIN_151
VCCIN_226
VCCIN_12
VCCIN_84
CC21
CG31
CP33
VCCIN_152
VCCIN_227
VCCIN_13
VCCIN_85
CC22
CG33
CP34
VCCIN_153
VCCIN_228
VCCIN_14
VCCIN_86
CC23
CG34
CP38
VCCIN_154
VCCIN_229
VCCIN_15
VCCIN_87
CC24
CG35
CP39
VCCIN_155
VCCIN_230
VCCIN_16
VCCIN_88
CC25
CG36
CP40
VCCIN_156
VCCIN_231
VCCIN_17
VCCIN_89
CC27
CG37
CP41
VCCIN_157
VCCIN_232
VCCIN_18
VCCIN_90
CC28
CG38
CR28
VCCIN_158
VCCIN_233
VCCIN_19
VCCIN_91
CC30
CG39
CR30
VCCIN_159
VCCIN_234
VCCIN_20
VCCIN_92
CC31
CG40
CR31
VCCIN_160
VCCIN_235
VCCIN_21
VCCIN_93
CC33
CG41
CR32
VCCIN_161
VCCIN_236
VCCIN_22
VCCIN_94
CC34
CH24
CR33
VCCIN_162
VCCIN_237
VCCIN_23
VCCIN_95
CC35
CH27
CR34
VCCIN_163
VCCIN_238
VCCIN_24
VCCIN_96
CD12
CH28
CR35
VCCIN_164
VCCIN_239
VCCIN_25
VCCIN_97
CD14
CH33
CR36
VCCIN_165
VCCIN_240
VCCIN_26
VCCIN_98
CD16
CH34
CR38
VCCIN_166
VCCIN_241
VCCIN_27
VCCIN_99
CD18
CH38
CR39
VCCIN_167
VCCIN_242
VCCIN_28
VCCIN_100
CD20
CH39
CT28
VCCIN_168
VCCIN_243
VCCIN_29
VCCIN_101
CD22
CJ24
CT30
VCCIN_169
VCCIN_244
VCCIN_30
VCCIN_102
CD23
CJ27
CT31
VCCIN_170
VCCIN_245
VCCIN_31
VCCIN_103
CD25
CJ28
CT32
VCCIN_171
VCCIN_246
VCCIN_32
VCCIN_104
CD27
CJ30
CT33
VCCIN_172
VCCIN_247
VCCIN_33
VCCIN_105
CD30
CJ31
CT34
VCCIN_173
VCCIN_248
VCCIN_34
VCCIN_106
CD31
CJ33
CT35
VCCIN_174
VCCIN_249
VCCIN_35
VCCIN_107
CD34
CJ34
CT36
VCCIN_175
VCCIN_250
VCCIN_36
VCCIN_108
CD35
CJ35
CT38
VCCIN_176
VCCIN_251
VCCIN_37
VCCIN_109
CE12
CJ36
CT39
VCCIN_177
VCCIN_252
VCCIN_38
VCCIN_110
CE13
CJ38
CT40
VCCIN_178
VCCIN_253
VCCIN_39
VCCIN_111
CE14
CJ39
CT41
VCCIN_179
VCCIN_254
VCCIN_40
VCCIN_112
CE16
CJ40
CU28
VCCIN_180
VCCIN_255
VCCIN_41
VCCIN_113
CE18
CJ41
CU30
VCCIN_181
VCCIN_256
VCCIN_42
VCCIN_114
CE20
CK24
CU33
VCCIN_182
VCCIN_257
VCCIN_43
VCCIN_115
CE22
CK25
CU34
VCCIN_183
VCCIN_258
VCCIN_44
VCCIN_116
CE23
CK27
CU38
VCCIN_184
VCCIN_259
VCCIN_45
VCCIN_117
CE25
CK28
CU39
VCCIN_185
VCCIN_260
VCCIN_46
VCCIN_118
CE27
CK30
T18
VCCIN_186
VCCIN_261
VCCIN_47
VCCIN_119
CE30
CK31
U18
VCCIN_187
VCCIN_262
VCCIN_48
VCCIN_120
CE31
CK33
U20
VCCIN_188
VCCIN_263
VCCIN_49
VCCIN_121
CE34
CK34
V12
VCCIN_189
VCCIN_264
VCCIN_50
VCCIN_122
CE35
CK35
V13
VCCIN_190
VCCIN_265
VCCIN_51
VCCIN_123
CF13
CK36
V15
VCCIN_191
VCCIN_266
VCCIN_52
VCCIN_124
CF14
CL27
V17
VCCIN_192
VCCIN_267
VCCIN_53
VCCIN_125
CF16
CL28
V18
VCCIN_193
VCCIN_268
VCCIN_54
VCCIN_126
CF17
CL33
V20
VCCIN_194
VCCIN_269
VCCIN_55
VCCIN_127
CF18
CL34
W11
VCCIN_195
VCCIN_270
VCCIN_56
VCCIN_128
CF20
CL38
W13
VCCIN_196
VCCIN_271
VCCIN_57
VCCIN_129
CF21
CL39
W15
VCCIN_197
VCCIN_272
VCCIN_58
VCCIN_130
CF22
CL40
W17
VCCIN_198
VCCIN_273
VCCIN_59
VCCIN_131
CF23
CL41
W18
VCCIN_199
VCCIN_274
VCCIN_60
VCCIN_132
CF24
CM27
W20
VCCIN_200
VCCIN_275
VCCIN_61
VCCIN_133
CF25
CM28
Y11
VCCIN_201
VCCIN_276
VCCIN_62
VCCIN_134
CF27
CM30
Y12
VCCIN_202
VCCIN_277
VCCIN_63
VCCIN_135
CF28
CM31
Y13
VCCIN_203
VCCIN_278
VCCIN_64
VCCIN_136
CF30
CM33
Y15
VCCIN_204
VCCIN_279
VCCIN_65
VCCIN_137
CF31
CM34
Y18
VCCIN_205
VCCIN_280
VCCIN_66
VCCIN_138
CF33
CM35
Y20
VCCIN_206
VCCIN_281
VCCIN_67
VCCIN_139
CF34
CM36
VCCIN_207
VCCIN_282
VCCIN_68
CF35
CM38
CE41
VCCIN_208
VCCIN_283
VCCIN_69
VSSIN_SENSE
CF36
CM39
CE40
VCCIN_209
VCCIN_284
VCCIN_70
VCCIN_SENSE
CF38
CN27
VCCIN_210
VCCIN_285
VCCIN_71
CF39
CN28
U33
VCCIN_211
VCCIN_286
VCCIN_72
VCCIN_AUX_VSSSENSE
CF40
U34
VCCIN_212
VCCIN_287
VCCIN_AUX_VCCSENSE
CF41
VCCIN_213
VCCIN_288
CG14
VCCIN_214
VCCIN_289
TGL_H_CPU_IP_EXT
TGL_H_CPU_IP_EXT
100_1%_04
8,9,34,57
58,59
0_04
VCCIN_AUX_SENSE
38,61
6,38,61
VCCIN_AUX
0_04
VSSIN_AUX_SENSE
38,61
100_1%_04
Title
Title
Title
[05] CPU 4/6-VCCIN,VDDQ,SENSE
[05] CPU 4/6-VCCIN,VDDQ,SENSE
[05] CPU 4/6-VCCIN,VDDQ,SENSE
Size
Size
Size
Document Number
Document Number
Document Number
6-71-NP5H0-D02
6-71-NP5H0-D02
6-71-NP5H0-D02
A3
A3
A3
TGL-H+GN20-E3
TGL-H+GN20-E3
TGL-H+GN20-E3
Date:
Date:
Date:
Thursday, April 08, 2021
Thursday, April 08, 2021
Thursday, April 08, 2021
Sheet
Sheet
Sheet
2
1
D
C
B
VSSIN_SENSE_R
VCCIN_SENSE_R
VSSIN_AUX_SENSE_R
VCCIN_AUX_SENSE_R
VDDQ
A
VCCIN
Rev
Rev
Rev
D02
D02
D02
5
5
5
of
of
of
71
71
71
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