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VCCIN
5
D
1/13
for 8+1 4PHASE 750
for 6+1 3PHASE 1.5K
for 4+1 2PHASE NA
C
VCCIN_CSSUM
12/23
DC loadline: 1.5mR
PC1
*1000p_50V_X7R_04
TIGER H-Line 45W
H8+1
B
TGL H 4+1 45W 3PHASE
TGL H 6+1 45W 3PHASE
(1+1+0)
(1+1+1)
PMBUS Address
20h
20h
(2B)
4 DIGI Code
IAICCMAX
36(Performance)
74(Performance)
PL2
83(Performance)
65(Performance)
IAIPL2(A)
28(Performance)
45(Performance)
LL(mΩ)
1.5
1.5
Imon setting
102K_1%_04
49.9K_1%_04
VDIFFA Rdroop setting
604_1%_04
604_1%_04
A
CS1
1.5K_1%_04
1.5K_1%_04
CS2
1.5K_1%_04
1.5K_1%_04
CS3
NA
1.5K_1%_04
PSYS (198W)
4.02K_1%_04
4.02K_1%_04
5
4
3
PR205
0_04
59
VCCIN_TEMP
VDD3
PR206
PC107
49.9K_1%_04
1u_16V_X7R_06
PR182
4.7_1%_06
12/23
PR25
0_04
62
PSYS
VIN
PC7
*0.01u_50V_X7R_04
PC112
4.7u_6.3V_X6S_06
PR135
PR24
4.02K_1%_04
2M_1%_04
Psys setting base on charger spec:
12/23
1. 1uA/W information
2. Pmax : 198W
VCCIN_PWM1
VCCIN_PWM2
VIA*5
VCCIN_PWM3
59
VCCIN_CS2
59
VCCIN_CS1
59
VCCIN_CS3
1
21
VCCIN_EN
PR134
750_1%_04
CS3
EN
VCCIN_PE
PR133
1.5K_1%_04
2
20
CS2
PE
MP2940AGRT-3010-Z
PR132
1.5K_1%_04
3
19
CS1
STB
PU5
4
18
VDIFF
SDL_P
12/23
PR151
PC93
604_1%_04
5
17
VFB
SDA_P
330p_50V_X7R_04
6
16
VOSEN
VRHOT#
PR1
7
15
VORTN
VRRDY
*6.04K_1%_04
PC98
1000p_50V_X7R_04
VCCIN
PR143
*100_04
PC105
330p_50V_X7R_04
5
VCCIN_SENSE
SVID_ALERT#_VR
PR158
0_04
5
VSSIN_SENSE
SVID_DATA_VR
VCCIN_CSSUM
PR166
0_04
PC106
SVID_CLK_VR
1000p_50V_X7R_04
PR170
*100_04
PR175
61.9K_1%_04
PC114
for 8+1 4PHASE 35.7K
1u_16V_X7R_06
PR9
for 6+1 3PHASE 49.9K
35.7K_1%_04
for 4+1 2PHASE 102K
PC4
150pF_NPO_50V_0402
1/13
PR8
0_04
TGL H 8+1 45W 4PHASE
(1+1+2)
20h
105(Performance)
109(Performance)
RC
RD
RE
RF
PROJECT NAME
MPS TABLE
61(Performance)
MP2940AGRT-3083-rev1_GUI
100K
X
100K
X
100K
X
X
100K
1.5
X
100K
100K
X
35.7K_1%_04
604_1%_04
1.5K_1%_04
1.5K_1%_04
750_1%_04
4.02K_1%_04
4
3
Schematic Diagrams
2
PR211
10K_04
PJ24
2
1
*CV-40mil
3.3V
PC2
*0.1u_16V_X7R_04
DEFAULT SHORT
1
2
PJ3
1mm
4,31,40,52
ALL_SYS_PWRGD
DEFAULT
SHORT
VDD3
Angus 0415
RE
PR315
59
2K_04
59
59
VCCIN_PE
PR21
0_04
28,52,63,66
EC_GPIO
RF
3.3V
PC3
PR7
*100K_04
*0.1u_16V_X7R_04
PR194
PR193
*10K_1%_04
*10K_1%_04
VCCIN_SYNC
59
SMC_BAT 28,52,62
SMD_BAT 28,52,62
VR_HOT_N
H_VR_READY
40
VCCST
3.3VS
PR185
10K_1%_04
PR204
*1K_1%_04
VR_HOT_N
PR192
*100_1%_04
H_PROCHOT#
SVID_CLK_VR
H_CPU_SVIDCLK
4
PR186
0_04
SVID_ALERT#_VR
H_CPU_SVIDALRT#
4
PR184
0_04
SVID_DATA_VR
H_CPU_SVIDDAT
4
PR187
0_04
TGL-H 8+1
TGL-H 6+1
TGL-H 4+1
5,59
VCCIN
29,31,34,54,55,56,57,59,60,61,62,64
VIN
4,29,33,34,35,36,38,40,41,42,44,45,46,48,51,52,53,54,55,56,60,61,62,63,64,65,66,67
VDD3
2,30,31,41,45,46,47,49,50,54,57,59,64,65,66,67
3.3V
8,9,22,25,28,29,31,32,33,35,36,40,42,44,45,46,48,49,50,51,52,54,57,66
3.3VS
Title
Title
Title
4,6,33,55
VCCST
Size
Size
Size
A2
A2
A2
Date:
Date:
Date:
2
1
D
VCCIN_EN
1/13
Sheet 56
VCC
C
4
B
A
[58] VCCIN_2940
[58] VCCIN_2940
[58] VCCIN_2940
Document Number
Document Number
Document Number
Rev
Rev
Rev
TGL-H+GN20-E3
TGL-H+GN20-E3
TGL-H+GN20-E3
D02
D02
D02
Thursday, April 15, 2021
Thursday, April 15, 2021
Thursday, April 15, 2021
Sheet
Sheet
Sheet
58
58
58
of
of
of
71
71
71
1
VCCIN B - 57
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