Processor 3/7 - Clevo P957HP6 Service Manual

Table of Contents

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Processor 3/7

5
M_A_DQ[63:0]
9
U113A
KABYLAKE_HALO
BGA1440
M_A_DQ0
BR6
DDR0_DQ[0]
M_A_DQ1
BT6
DDR0_DQ[1]
DDR0_CKP[0]
M_A_DQ2
BP3
DDR0_DQ[2]
DDR0_CKN[0]
M_A_DQ3
BR3
DDR0_DQ[3]
DDR0_CKN[1]
M_A_DQ4
BN5
DDR0_DQ[4]
DDR0_CKP[1]
M_A_DQ5
BP6
DDR0_DQ[5]
DDR0_CLKP[2]
M_A_DQ6
BP2
DDR0_DQ[6]
DDR0_CLKN[2]
M_A_DQ7
BN3
D
DDR0_DQ[7]
DDR0_CLKP[3]
M_A_DQ8
BL4
DDR0_DQ[8]
DDR0_CLKN[3]
M_A_DQ9
BL5
DDR0_DQ[9]
M_A_DQ10
BL2
DDR0_DQ[10]
DDR0_CKE[0]
M_A_DQ11
BM1
DDR0_DQ[11]
DDR0_CKE[1]
M_A_DQ12
BK4
DDR0_DQ[12]
DDR0_CKE[2]
M_A_DQ13
BK5
DDR0_DQ[13]
DDR0_CKE[3]
M_A_DQ14
BK1
DDR0_DQ[14]
M_A_DQ15
BK2
DDR0_DQ[15]
DDR0_CS#[0]
M_A_DQ16
BG4
DDR0_DQ[16]/DDR0_DQ[32]
DDR0_CS#[1]
M_A_DQ17
BG5
DDR0_DQ[17]/DDR0_DQ[33]
DDR0_CS#[2]
M_A_DQ18
BF4
DDR0_DQ[18]/DDR0_DQ[34]
DDR0_CS#[3]
M_A_DQ19
BF5
DDR0_DQ[19]/DDR0_DQ[35]
M_A_DQ20
BG2
DDR0_DQ[20]/DDR0_DQ[36]
DDR0_ODT[0]
M_A_DQ21
BG1
DDR0_DQ[21]/DDR0_DQ[37]
DDR0_ODT[1]
M_A_DQ22
BF1
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_ODT[2]
M_A_DQ23
BF2
DDR0_DQ[23]/DDR0_DQ[39]
DDR0_ODT[3]
M_A_DQ24
BD2
DDR0_DQ[24]/DDR0_DQ[40]
M_A_DQ25
BD1
DDR0_DQ[25]/DDR0_DQ[41]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
M_A_DQ26
BC4
DDR0_DQ[26]/DDR0_DQ[42]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
M_A_DQ27
BC5
DDR0_DQ[27]/DDR0_DQ[43]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
M_A_DQ28
BD5
DDR0_DQ[28]/DDR0_DQ[44]
M_A_DQ29
BD4
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
M_A_DQ30
BC1
DDR0_DQ[30]/DDR0_DQ[46]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
BC2
M_A_DQ31
DDR0_DQ[31]/DDR0_DQ[47]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
M_A_DQ32
AB1
DDR0_DQ[32]/DDR1_DQ[0]
M_A_DQ33
AB2
DDR0_DQ[33]/DDR1_DQ[1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
M_A_DQ34
AA4
DDR0_DQ[34]/DDR1_DQ[2]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
AA5
M_A_DQ35
DDR0_DQ[35]/DDR1_DQ[3]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
C
M_A_DQ36
AB5
DDR0_DQ[36]/DDR1_DQ[4]
DDR0_MA[3]
M_A_DQ37
AB4
DDR0_DQ[37]/DDR1_DQ[5]
DDR0_MA[4]
M_A_DQ38
AA2
DDR0_DQ[38]/DDR1_DQ[6]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
AA1
M_A_DQ39
DDR0_DQ[39]/DDR1_DQ[7]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
M_A_DQ40
V5
DDR0_DQ[40]/DDR1_DQ[8]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
M_A_DQ41
V2
DDR0_DQ[41]/DDR1_DQ[9]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
M_A_DQ42
U1
DDR0_DQ[42]/DDR1_DQ[10]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
U2
M_A_DQ43
DDR0_DQ[43]/DDR1_DQ[11]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
M_A_DQ44
V1
DDR0_DQ[44]/DDR1_DQ[12]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
M_A_DQ45
V4
DDR0_DQ[45]/DDR1_DQ[13]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
M_A_DQ46
U5
DDR0_DQ[46]/DDR1_DQ[14]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
U4
M_A_DQ47
DDR0_DQ[47]/DDR1_DQ[15]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
M_A_DQ48
R2
DDR0_DQ[48]/DDR1_DQ[32]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
M_A_DQ49
P5
DDR0_DQ[49]/DDR1_DQ[33]
M_A_DQ50
R4
DDR0_DQ[50]/DDR1_DQ[34]
DDR0_PAR
M_A_DQ51
P4
DDR0_DQ[51]/DDR1_DQ[35]
DDR0_ALERT#
M_A_DQ52
R5
DDR0_DQ[52]/DDR1_DQ[36]
M_A_DQ53
P2
DDR0_DQ[53]/DDR1_DQ[37]
M_A_DQ54
R1
DDR0_DQ[54]/DDR1_DQ[38]
DDR0_DQSN[0]
M_A_DQ55
P1
DDR0_DQ[55]/DDR1_DQ[39]
DDR0_DQSN[1]
M_A_DQ56
M4
DDR0_DQ[56]/DDR1_DQ[40]
DDR0_DQSN[2]/DDR0_DQSN[4]
M_A_DQ57
M1
DDR0_DQ[57]/DDR1_DQ[41]
DDR0_DQSN[3]/DDR0_DQSN[5]
M_A_DQ58
L4
DDR0_DQ[58]/DDR1_DQ[42]
DDR0_DQSP[4]/DDR1_DQSP[0]
M_A_DQ59
L2
DDR0_DQ[59]/DDR1_DQ[43]
DDR0_DQSP[5]/DDR1_DQSP[1]
M_A_DQ60
M5
DDR0_DQ[60]/DDR1_DQ[44]
DDR0_DQSP[6]/DDR1_DQSP[4]
M_A_DQ61
M2
DDR0_DQ[61]/DDR1_DQ[45]
DDR0_DQSP[7]/DDR1_DQSP[5]
M_A_DQ62
L5
DDR0_DQ[62]/DDR1_DQ[46]
M_A_DQ63
L1
DDR0_DQ[63]/DDR1_DQ[47]
DDR0_DQSP[0]
B
DDR0_DQSP[1]
M_A_CB0
BA2
DDR0_ECC[0]
DDR0_DQSP[2]/DDR0_DQSP[4]
M_A_CB1
BA1
DDR0_ECC[1]
DDR0_DQSP[3]/DDR0_DQSP[5]
M_A_CB2
AY4
DDR0_ECC[2]
DDR0_DQSN[4]/DDR1_DQSN[0]
M_A_CB3
AY5
DDR0_ECC[3]
DDR0_DQSN[5]/DDR1_DQSN[1]
M_A_CB4
BA5
DDR0_ECC[4]
DDR0_DQSN[6]/DDR1_DQSN[4]
M_A_CB5
BA4
DDR0_ECC[5]
DDR0_DQSN[7]/DDR1_DQSN[5]
M_A_CB6
AY1
DDR0_ECC[6]
M_A_CB7
AY2
DDR0_ECC[7]
DDR0_DQSP[8]
DDR0_DQSN[8]
DDR CHANNEL A
1 OF 14
REV = 1
QLM5
A
5
4
3
10
M_B_DQ[63:0]
?
M_B_DQ0
BT11
M_B_DQ1
BR11
M_B_DQ2
BT8
AG1
M_B_DQ3
BR8
M_A_CLK_DDR0
9
AG2
M_B_DQ4
BP11
M_A_CLK_DDR#0
9
AK1
M_B_DQ5
BN11
M_A_CLK_DDR#1
9
AK2
M_B_DQ6
BP8
M_A_CLK_DDR1
9
AL3
M_B_DQ7
BN8
AK3
M_B_DQ8
BL12
AL2
M_B_DQ9
BL11
AL1
M_B_DQ10
BL8
M_B_DQ11
BJ8
AT1
M_B_DQ12
BJ11
M_A_CKE0
9
AT2
M_B_DQ13
BJ10
M_A_CKE1
9
AT3
M_B_DQ14
BL7
AT5
M_B_DQ15
BJ7
M_B_DQ16
BG11
AD5
M_B_DQ17
BG10
M_A_CS#0
9
AE2
M_B_DQ18
BG8
M_A_CS#1
9
AD2
M_B_DQ19
BF8
AE5
M_B_DQ20
BF11
M_B_DQ21
BF10
AD3
M_B_DQ22
BG7
M_A_ODT0
9
AE4
M_B_DQ23
BF7
M_A_ODT1
9
AE1
M_B_DQ24
BB11
AD4
M_B_DQ25
BC11
M_B_DQ26
BB8
AH5
M_B_DQ27
BC8
M_A_BA0
9
AH1
M_B_DQ28
BC10
M_A_BA1
9
AU1
M_B_DQ29
BB10
M_A_BG0
9
M_B_DQ30
BC7
AH4
M_B_DQ31
BB7
M_A_RAS#
9
AG4
M_B_DQ32
AA11
M_A_WE#
9
AD1
AA10
M_B_DQ33
M_A_CAS#
9
M_B_DQ34
AC11
AH3
M_B_DQ35
AC10
M_A_A0
9
AP4
M_B_DQ36
AA7
M_A_A1
9
AN4
AA8
M_B_DQ37
M_A_A2
9
AP5
M_B_DQ38
AC8
M_A_A3
9
AP2
M_B_DQ39
AC7
M_A_A4
9
AP1
M_B_DQ40
W8
M_A_A5
9
AP3
W7
M_B_DQ41
M_A_A6
9
AN1
M_B_DQ42
V10
M_A_A7
9
AN3
M_B_DQ43
V11
M_A_A8
9
AT4
M_B_DQ44
W11
M_A_A9
9
AH2
W10
M_B_DQ45
M_A_A10
9
AN2
M_B_DQ46
M_A_A11
9
AU4
M_B_DQ47
M_A_A12
9
AE3
M_B_DQ48
R11
M_A_A13
9
AU2
P11
M_B_DQ49
M_A_BG1
9
AU3
M_B_DQ50
M_A_ACT#
9
M_B_DQ51
AG3
M_B_DQ52
R10
DDR0_A_PARITY
9
AU5
M_B_DQ53
P10
DDR0_A_ALERT#
9
M_B_DQ54
M_B_DQ55
M_A_DQS#[3:0]
9
BR5
M_A_DQS#0
M_B_DQ56
L11
BL3
M_A_DQS#1
M_B_DQ57
M11
BG3
M_A_DQS#2
M_B_DQ58
BD3
M_A_DQS#3
M_B_DQ59
M_A_DQS[7:4]
9
AB3
M_A_DQS4
M_B_DQ60
L10
V3
M_A_DQS5
M_B_DQ61
M10
R3
M_A_DQS6
M_B_DQ62
M3
M_A_DQS7
M_B_DQ63
M_A_DQS[3:0]
9
BP5
M_A_DQS0
M_B_CB0
AW11
BK3
M_A_DQS1
M_B_CB1
AY11
BF3
M_A_DQS2
M_B_CB2
AY8
BC3
M_A_DQS3
M_B_CB3
AW8
M_A_DQS#[7:4]
9
AA3
M_A_DQS#4
M_B_CB4
AY10
U3
M_A_DQS#5
M_B_CB5
AW10
P3
M_A_DQS#6
M_B_CB6
AY7
L3
M_A_DQS#7
M_B_CB7
AW7
AY3
BA3
CLOSE TO CPU
R534
121_1%_04
DDR_RCOMP0
R537
75_1%_04
DDR_RCOMP1
R546
100_1%_04
DDR_RCOMP2
?
4
3
2
U113B
BABYLAKE_HALO
?
BGA1440
AM9
DDR1_DQ[0]/DDR0_DQ[16]
DDR1_CKP[0]
AN9
DDR1_DQ[1]/DDR0_DQ[17]
DDR1_CKN[0]
AM8
DDR1_DQ[2]/DDR0_DQ[18]
DDR1_CKN[1]
AM7
DDR1_DQ[3]/DDR0_DQ[19]
DDR1_CKP[1]
AM11
DDR1_DQ[4]/DDR0_DQ[20]
DDR1_CLKP[2]
AM10
DDR1_DQ[5]/DDR0_DQ[21]
DDR1_CLKN[2]
AJ10
DDR1_DQ[6]/DDR0_DQ[22]
DDR1_CLKP[3]
AJ11
DDR1_DQ[7]/DDR0_DQ[23]
DDR1_CLKN[3]
DDR1_DQ[8]/DDR0_DQ[24]
AT8
DDR1_DQ[9]/DDR0_DQ[25]
DDR1_CKE[0]
AT10
DDR1_DQ[10]/DDR0_DQ[26]
DDR1_CKE[1]
AT7
DDR1_DQ[11]/DDR0_DQ[27]
DDR1_CKE[2]
AT11
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_CKE[3]
DDR1_DQ[13]/DDR0_DQ[29]
AF11
DDR1_DQ[14]/DDR0_DQ[30]
DDR1_CS#[0]
AE7
DDR1_DQ[15]/DDR0_DQ[31]
DDR1_CS#[1]
AF10
DDR1_DQ[16]/DDR0_DQ[48]
DDR1_CS#[2]
AE10
DDR1_DQ[17]/DDR0_DQ[49]
DDR1_CS#[3]
DDR1_DQ[18]/DDR0_DQ[50]
AF7
DDR1_DQ[19]/DDR0_DQ[51]
DDR1_ODT[0]
AE8
DDR1_DQ[20]/DDR0_DQ[52]
DDR1_ODT[1]
AE9
DDR1_DQ[21]/DDR0_DQ[53]
DDR1_ODT[2]
AE11
DDR1_DQ[22]/DDR0_DQ[54]
DDR1_ODT[3]
DDR1_DQ[23]/DDR0_DQ[55]
AH10
DDR1_DQ[24]/DDR0_DQ[56]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
AH11
DDR1_DQ[25]/DDR0_DQ[57]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
AF8
DDR1_DQ[26]/DDR0_DQ[58]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_DQ[27]/DDR0_DQ[59]
AH8
DDR1_DQ[28]/DDR0_DQ[60]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
AH9
DDR1_DQ[29]/DDR0_DQ[61]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
AR9
DDR1_DQ[30]/DDR0_DQ[62]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_DQ[31]/DDR0_DQ[63]
AJ9
DDR1_DQ[32]/DDR1_DQ[16]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
AK6
DDR1_DQ[33]/DDR1_DQ[17]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
AK5
DDR1_DQ[34]/DDR1_DQ[18]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
AL5
DDR1_DQ[35]/DDR1_DQ[19]
DDR1_MA[3]
AL6
DDR1_DQ[36]/DDR1_DQ[20]
DDR1_MA[4]
AM6
DDR1_DQ[37]/DDR1_DQ[21]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
AN7
DDR1_DQ[38]/DDR1_DQ[22]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
AN10
DDR1_DQ[39]/DDR1_DQ[23]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
AN8
DDR1_DQ[40]/DDR1_DQ[24]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
AR11
DDR1_DQ[41]/DDR1_DQ[25]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
AH7
DDR1_DQ[42]/DDR1_DQ[26]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
AN11
DDR1_DQ[43]/DDR1_DQ[27]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
AR10
DDR1_DQ[44]/DDR1_DQ[28]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
AF9
DDR1_DQ[45]/DDR1_DQ[29]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
V7
AR7
DDR1_DQ[46]/DDR1_DQ[30]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
V8
AT9
DDR1_DQ[47]/DDR1_DQ[31]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_DQ[48]
AJ7
DDR1_DQ[49]
DDR1_PAR
P7
AR8
DDR1_DQ[50]
DDR1_ALERT#
R8
DDR1_DQ[51]
DDR1_DQ[52]
BP9
M_B_DQS#0
DDR1_DQ[53]
DDR1_DQSN[0]/DDR0_DQSN[2]
R7
BL9
M_B_DQS#1
DDR1_DQ[54]
DDR1_DQSN[1]/DDR0_DQSN[3]
P8
BG9
M_B_DQS#2
DDR1_DQ[55]
DDR1_DQSN[2]/DDR0_DQSN[6]
BC9
M_B_DQS#3
DDR1_DQ[56]
DDR1_DQSN[3]/DDR0_DQSN[7]
AC9
M_B_DQS#4
DDR1_DQ[57]
DDR1_DQSN[4]/DDR1_DQSN[2]
L7
W9
M_B_DQS#5
DDR1_DQ[58]
DDR1_DQSN[5]/DDR1_DQSN[3]
M8
R9
M_B_DQS#6
DDR1_DQ[59]
DDR1_DQSN[6]
M9
M_B_DQS#7
DDR1_DQ[60]
DDR1_DQSN[7]
DDR1_DQ[61]
M7
BR9
M_B_DQS0
DDR1_DQ[62]
DDR1_DQSP[0]/DDR0_DQSP[2]
L8
BJ9
M_B_DQS1
DDR1_DQ[63]
DDR1_DQSP[1]/DDR0_DQSP[3]
BF9
M_B_DQS2
DDR1_DQSP[2]/DDR0_DQSP[6]
BB9
M_B_DQS3
DDR1_ECC[0]
DDR1_DQSP[3]/DDR0_DQSP[7]
AA9
M_B_DQS4
DDR1_ECC[1]
DDR1_DQSP[4]/DDR1_DQSP[2]
V9
M_B_DQS5
DDR1_ECC[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
P9
M_B_DQS6
DDR1_ECC[3]
DDR1_DQSP[6]
L9
M_B_DQS7
DDR1_ECC[4]
DDR1_DQSP[7]
DDR1_ECC[5]
AW9
DDR1_ECC[6]
DDR1_DQSP[8]
AY9
DDR1_ECC[7]
DDR1_DQSN[8]
DDR CHANNEL B
G1
BN13
DDR_RCOMP[0]
DDR_VREF_CA
H1
BP13
DIMM_DQ_CPU_VREF_A
DDR_RCOMP[1]
DDR0_VREF_DQ
J2
BR13
DDR_RCOMP[2]
DDR1_VREF_DQ
2 OF 14
REV = 1
QLM5
?
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[04] Processor 3/7-DDR4
[04] Processor 3/7-DDR4
[04] Processor 3/7-DDR4
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P9500-D02A
6-71-P9500-D02A
6-71-P9500-D02A
Custom
Custom
Custom
P950HP
P950HP
P950HP
Date:
Date:
Date:
Wednesday, March 08, 2017
Wednesday, March 08, 2017
Wednesday, March 08, 2017
2
Schematic Diagrams
1
M_B_CLK_DDR0
10
M_B_CLK_DDR#0
10
M_B_CLK_DDR#1
10
M_B_CLK_DDR1
10
M_B_CKE0
10
D
M_B_CKE1
10
M_B_CS#0
10
M_B_CS#1
10
M_B_ODT0
10
M_B_ODT1
10
M_B_RAS#
10
M_B_WE#
10
M_B_CAS#
10
M_B_BA0
10
M_B_BA1
10
M_B_BG0
10
M_B_A0
10
M_B_A1
10
M_B_A2
10
M_B_A3
10
M_B_A4
10
M_B_A5
10
C
M_B_A6
10
Sheet 4 of 74
M_B_A7
10
M_B_A8
10
M_B_A9
10
M_B_A10
10
Processor 3/7
M_B_A11
10
M_B_A12
10
M_B_A13
10
M_B_BG1
10
M_B_ACT#
10
DDR1_B_PARITY
10
DDR1_B_ALERT#
10
M_B_DQS#[3:0]
10
M_B_DQS#[7:4]
10
M_B_DQS[3:0]
10
M_B_DQS[7:4]
10
B
DIMM_CA_CPU_VREF_A
9
DIMM_DQ_CPU_VREF_B
10
A
Rev
Rev
Rev
D02A
D02A
D02A
Sheet
Sheet
Sheet
4
4
4
of
of
of
74
74
74
1
Processor 3/7 B - 5

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