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Schematic Diagrams
PEX_VDD
A
Cold boot/Optimus: 1V8_AON 1V8_RUN NVVDD NVVDDS
GC6 2.1 Exit: 1V8_RUN NVVDD_L NVVDD_S PEX_VDD or 1V8_RUN NVVDD_L NVVDD_S & PEX_VDD
Sheet 55 of 74
PEX_VDD
B
GPU
C
GPU
D
B - 56 PEX_VDD
1
2
3
Open VREG Type 0
<HDL_POWER>
PC193
PR321
22u_6.3V_X5R_08
10_06
PU11
EM5841BVT
PR322
10K_04
GND
DFN10
3.3V
COMMON
0.200
PEX_VDD_PWRGD
9
PGOOD
OpenVReg
PR323
0_04
PEXVDD_EN
10
29
NV_PEXVDD_EN
EN/FS
PC198
2
VCC
*0.1u_10V_X7R_04
PC195
1
FB
0.1u_10V_X7R_04
GND
GND
PEX_VDD FBVDDQ
1V8_AON
1V8_MAIN
GC6_FB_EN
NVVDD
NVVDDS
VR Complex
1V8_MAIN_EN
PEX&1.05V
FBVDD/Q
GPU_PWR_EN
GPU_EVENT#
GPU_RST#
EC/PCH
SYS_PEX_RST_MON#
PLATFORM_RST#
GPU_PEX_RST_HOLD#
GC6 2.1 Control Signals
1.1V8_MAIN_EN
2.GC6_FB_EN
3.GPU_EVENT#
4.GPU_PEX_RST_HOLD#
5.SYS_PEX_RST_MON#
GPU_PEX_RST#
GPU_PWR_EN
EN
PGOOD
GC6 2.1 - VR Complex
(SYSTEM)
1. GPU_PWR_EN
1V8_AON
2. 1V8_MAIN_EN
1V8_AON
3. GC6_FB_EN
PGOOD
EN
PGOOD
EN
PEX&1.05V
1V8_MAIN_EN
1V8_MAIN
GPPG8_PCH_1V8RUN_EN (GPP_G8) (1V8_MAIN)
EN
PGOOD
NVVDD
GPPG11_PCH_NVVDDS_EN (GPP_G11) (NVVDDS)
EN
PGOOD
GPPG0_PCH_PEXVDD_EN (GPP_G0) (PEX_VDD)
FBVDD/Q
GC6_FB_EN
1
2
3
4
5
PEX_VDD
2.6Amps @ 1.0V
PC188
PR316
0.1u_10V_X7R_04
10K_1%_04
GND
PR315
*160K_04
3
VIN
PC192 *0.01u_16V_X7R_04
PL9
8
0.400
1
2
PEX_VDD_R
1
2
BOOT/NC
2.2uH_4*4*2.0
PJ35
6
*3mm
SW
7
SW
4
GND
5
GND
11
THERM
PR314
*20mil short-p
PR311
*20mil short-p
PC190
3300p_50V_X7R_04
GND
Rt
PR313
6.8K_1%_04
Vout= Vref * (1+(Rt/Rb))
Rb
PR324
9.53K_1%_04
1.028V= 0.6 * (1+(6.8K/9.53K))
PWR_SRC_NV_FB
VIN
PRS2
0.400
<NV_NET_MAX_CURRENT>
4
1
<NV_NET_MAX_CURRENT>
3
2
PWR_SRC_VINP_R
PR86
10_1%_04
PWR_SRC_VINP
RL1632T4F-B-R005-FNH
12
COMMON
PR87
665K_1%_04
PC60
GND
1%
1206
10u_6.3V_X5R_06
11
PWR_SRC_VINN_R
PR85
10_1%_04
PWR_SRC_VINN
PR27
10_1%_04
VIN2P
15
64
PWR_SRC_NV_VINP_R
PR55
665K_1%_04
PC55
GND
10u_6.3V_X5R_06
14
NVVDD
PR25
10_1%_04
VIN2N
64
PWR_SRC_NV_VINN_R
PR274
10_1%_04
SNN_VIN3P
2
63
PWR_SRC_NVS_VINNP_R
PR43
665K_1%_04
PC51
GND
10u_6.3V_X5R_06
1
NVVDDS
PR272
10_1%_04
SNN_VIN3N
63
PWR_SRC_NVS_VINN_R
8
9
1V8_AON
PR64
10K_04
PWR_SRC_WARN*
PR79
10K_04
PWR_SRC_CRTCAL*
DG P.93
note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.
N17E
POWER ON SEQUENCE
net
PCH_GPIO
Voltage
DGPU_PWR_EN (GPP_F23) (1V8_AON)
GPPG9_PCH_NV3V3_EN (GPP_G9) (NV3V3)
GPPG10_PCH_NVVDD_EN (GPP_G10) (NVVDD)
FBVDDQ
4
5
6
7
PEX_VDD
PC184
PC183
PC181
PEX_VDD_R
VDD3
R457
10_06
R483
Q42A
100K_04
D
MTDK5S6R
2
G
S
GND
Q42B
D
MTDK5S6R
PEXVDD_EN
5
G
S
PU1
NV3V3
INS144386293
NV3V3
QFN16
COMMON
PC50
PR49
VIN1P
4
0.01u_50V_X7R_04
*10K_04
VS
GND
6
I2CC_SCL
SCL
I2CC_SCL
27,55
7
I2CC_SDA
VIN1N
SDA
I2CC_SDA
27,55
5
PWR_SRC_IMON_A0
PR52
10K_04
A0
Place resistors
close to IC
VIN2P
GND
VIN2N
10
PWR_SRC_VALID
VIN3P
PV
13
SNN_TC
TC
16
SNN_VPU
VPU
VIN3N
14,26
12,13,14,27,54,63,64
63,64,66
PWR_SRC_NV_FB
WARN
14,15,24,25,28,54
3
GND
32,43,45,46,50,52,53,54,57,59,60,61
17
CRIT
PAD
11,39,42,43,44,52,56,57,58,59,60,61,62
13,14,24,25,27,28,29,54,63,64,66
2,11,27,29,42,44,45,46,47,49,50,52,53,54,57,58
INA3221AIRGV
5,27,30,33,36,38,39,42,44,48,50,51,52,53,54,56,58,61,62,63,65,66
GND
PR67
*0402_short
PR78
*0402_short
GPIO28_OC_WARN#
27
POWER RAIL
State in GC6
1V8_AON
ON
OFF
1V8_MAIN
PEX&1.05V
OFF
NVVDD
OFF
OFF
NVVDDS
FBVDD/Q
ON
POWER OFF SEQUENCE
27,55
I2CC_SCL
27,55
I2CC_SDA
28,64
GPU_GND_SENSE
28,64
GPU_NVVDD_SENSE
28,66
FBVDDQ_SENSE
28,66
FBVDDQ_SENSE_RTN
66
PS2_FBVDDQ_FB
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[55] PEX_VDD
[55] PEX_VDD
[55] PEX_VDD
Size
Size
Size
Document Number
Document Number
Document Number
6-71-P9500-D02A
6-71-P9500-D02A
6-71-P9500-D02A
Custom
Custom
Custom
P950HP
P950HP
P950HP
Date:
Date:
Date:
Tuesday, March 14, 2017
Tuesday, March 14, 2017
Tuesday, March 14, 2017
Sheet
Sheet
Sheet
6
7
8
A
B
PEX_VDD
NV3V3
1V8_RUN
5V
VIN
1V8_AON
3.3V
VDD3
C
I2CC_SCL
I2CC_SDA
GPU_GND_SENSE
GPU_NVVDD_SENSE
D
FBVDDQ_SENSE
FBVDDQ_SENSE_RTN
PS2_FBVDDQ_FB
Rev
Rev
Rev
D02A
D02A
D02A
55
55
55
of
of
of
74
74
74
8
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