Panasonic KX-TDA100AL Service Manual page 37

Signal Name
VBUS Bit indicating that power source is supplied to USB bus [Host (PC etc.) is connected.]
Host connected L: Host not connected
VREF Reference Voltage for MOH Circuit Intermediate potential of +15V
nWAIT Wait: Hardware wait request signal for bus timing between CPU and ASIC
WDTCLR Reserve
nWE Write Enable: WE signal of SRAM
- ASIC block
Configuration: IC102 (ASIC), IC111, X103 and so on.
Function: (IC102)
This Functions as the bus master of EC bus (synchronous bus
with 16 bit width, transmission rate max.10Mbps). Communicates
with ASIC mounted to each option card via EC bus and controls
the option card.
Controls CT bus (HW clock 8.192MHz, 8 highway, 128 timeslot) for
TSW function.
(The detailed description of TSW will be added later.)
Controls the conference call for 3 people x ~8 parties ~ 8 people x
~3 parties.
Generates single and DTMF tone in any highway and timeslot.
Provides the digital gain control function by data conversion.
Provides some I/O ports for CODEC channel pulse generation,
modem encoding rule setting and music on-hold switching and is
controlled by CPU.
- Memory block
Configuration: IC301, IC302 (SRAM), IC303 (FlashROM), IC305,
IC306 (SDRAM), IC309, IC310, IC311 (logic IC) and so on.
Function: (IC301, IC302)
Saves the user configuration data (such as key assign data per
PT).
This memory is done a battery backup.
(IC303)
Saves (some of) the system boot program and the system data.
(IC305, IC306)
The main program is loaded from the SD card on the system start-
Function
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