Panasonic KX-TDA100AL Service Manual page 34

Hybrid ip-pbx
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Signal Name
nCS_SRAM0
Chip Select for SRAM0: CS signal for IC301
nCS_SRAM1
Chip Select for SRAM1: CS signal for IC302
nCS_USB
Chip Select for USB I/F
nCTS2
Clear To Send from RS-232C connector
CTS_RMT
Clear to Send: Flow signal for modem
CT_C8
Clock8.192MHz clock outputted from PLL master
CT_D[0] -[7]
CT Data Bus: Two-way serial data bus to which the drive from any card is possible
the system.
CT_FRAME
Frame Signal: 8KHz frame signal outputted from the master
CT_NETREF
Backup Synchronous Signal (MAX 2MHz) 8KHz signal output from slave etc.
C_CS[0]
Chip Select For RMT
D[0] -D[31]
Data Bus
nDACK0-1
DMA Acknowledge: For USB I/F
DCD2
Data Carrier Detect
DCLK_RMT
Codec Clock (8MHz): For RMT
nDC_ALM
DC ALARM:DC alarm signal; Indicates the declined DC voltage. (L: Alarm condition)
DIN_RMT
Codec Data Input: For RMT
DOUT_RMT
Codec Data Output: For RMT
DQMLL (nWE0)
Data Input/Output Mask (Write Enable): DQM signal for SDRAM and WE signal
memory IC and ASIC
DQMLU (nWE1)
DQMUL (nWE2)
DQMUU (nWE3)
nDREQ0-1
DMA Request: For USB I/F
DSR2
Data Set Ready from RS-232C connector
DSR_RMT
Data Set Ready from RS-232C connector
DTR2
Data Terminal Ready to RS-232C connector
EC_AD[0] -[15]
Address of EC Synchronous Bus, Data Bus (4MHz)
EC_nCBE[1]-[0] EC Bus Command/Byte Enable: The initiator drives as bus command in the address
phase and as byte enable in the data phase.
EC_nCDET
EC Line Card Detection Signal Asynchronous interrupting signal
EC_CLK
Clock of EC Synchronous Bus (8MHz) All the EC bus signal except nRESET/EC_INT
operates in sync with this signal.
EC_nFRAME
EC Cycle Frame Signal: This indicates the drive by initiator and the execution of
cycle.
EC_nINT
EC Interrupting Signal: This is asserted, when slave interrupt occurs.
EC_PAR
Parity Bit of EC Synchronous Bus: Drive by applying even parity to AD[15:0] and
0]. (4MHz)
EC_nPERR
EC Parity Error: Flag indicating error status by parity flag
EC_nRST
EC Reset Input: System reset input signal
EC_nSTOP
EC Bus Stop Signal: This is asserted, when target requests transaction halt to
EC_nTRDY
EC Target Ready Signal: This indicates the drive by target and the possible data
nFAN_ALM
Fan Alarm: It goes Low at the error of the L Power Supply's FAN. It goes High when
FAN is normal and, Power Supply S and M, which does not carry the FAN, are used.
Function
34

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