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IC
TLC5733IPM (TI)
C-MOS 8-BIT 3CHANNEL SEMI-FLASH A/D CONVERTER
-TOP VIEW-
49
GND
GND
50
AV
DD ( +5V )
AV
DD ( +5V )
55
V
DD ( +5V )
DGND
60
AV
DD ( +5V )
64
GND
PIN
PIN
I/O
SIGNAL
I/O
SIGNAL
No.
No.
( A )
( QA )
1
I
V
14
—
DV
RB
DD
OE ( A )
DGND ( QB )
2
I
15
—
3
I
NT/PAL
16
—
DV
( QB )
DD
D ( B ) 8
4
I
TEST
17
O
DGND ( QA )
D ( B ) 7
5
—
18
O
6
O
D ( A ) 8
19
O
D ( B ) 6
D ( A ) 7
D ( B ) 5
7
O
20
O
8
O
D ( A ) 6
21
O
D ( B ) 4
D ( A ) 5
D ( B ) 3
9
O
22
O
D ( A ) 4
D ( B ) 2
10
O
23
O
11
O
D ( A ) 3
24
O
D ( B ) 1
D ( A ) 2
12
O
25
—
DGND
13
O
D ( A ) 1
26
—
DV
DD
14-38
32
30
25
20
17
(D V
, AV
DD
DD
PIN
PIN
PIN
I/O
SIGNAL
I/O
SIGNAL
I/O
No.
No.
No.
( C )
D ( C ) 4
CLPV ( B )
27
—
I
40
O
53
I
BIAS
CLPV ( C )
D ( C ) 3
28
I
41
O
54
—
29
I
V
( C )
42
O
D ( C ) 2
55
I
RT
( C )
D ( C ) 1
30
—
AV
43
O
56
I
DD
( C )
DGND ( QC )
31
I
V
44
—
57
I
IN
32
—
GND ( C )
45
I
MODE1
58
I
( C )
33
I
V
46
I
MODE0
59
—
RB
34
I
OE ( C )
47
I
OE ( B )
60
I
CLPV ( A )
( QC )
( B )
35
—
DV
48
I
V
61
I
DD
RB
D ( C ) 8
GND ( B )
36
O
49
—
62
—
AV
37
O
D ( C ) 7
50
I
V
( B )
63
I
IN
D ( C ) 6
( B )
38
O
51
—
AV
64
—
DD
39
O
D ( C ) 5
52
I
V
( B )
RT
SAMPLING
63
( A )
V
IN
COMPARATOR
61
( A )
V
RT
1
( A )
V
RB
CLAMP
60
CLPV ( A )
CONTROL
59
CIRCUIT
( A )
I
BIAS
2
OE ( A )
SAMPLING
50
V
( B )
IN
COMPARATOR
52
( B )
V
RT
48
V
( B )
RB
CLAMP
53
CLPV ( B )
CONTROL
54
CIRCUIT
( B )
I
BIAS
47
OE ( B )
SAMPLING
31
( C )
V
IN
COMPARATOR
29
( C )
V
RT
33
( C )
V
RB
CLAMP
28
CLPV ( C )
CONTROL
27
CIRCUIT
( C )
I
BIAS
34
OE ( C )
55
CLAMP PULSE
EXTCLP
INTERNAL/EXTERNAL
57
CLPEN
CONTROL
3
NT/PAL
CIRCUIT
56
CLK
58
XSYNC
63
6
V
( A )
D ( A ) 8
IN
50
7
( B )
D ( A ) 7
V
IN
31
8
( C )
D ( A ) 6
V
IN
9
D ( A ) 5
60
10
CLPV ( A )
D ( A ) 4
53
11
CLPV ( B )
D ( A ) 3
28
12
CLPV ( C )
D ( A ) 2
13
D ( A ) 1
1
( A )
V
RB
48
17
( B )
D ( B ) 8
V
RB
33
18
V
( C )
D ( B ) 7
RB
19
D ( B ) 6
61
20
( A )
D ( B ) 5
V
RT
52
21
V
( B )
D ( B ) 4
RT
29
22
( C )
D ( B ) 3
V
RT
23
D ( B ) 2
2
24
OE ( A )
D ( B ) 1
= +5 V )
47
OE ( B )
34
36
SIGNAL
OE ( C )
D ( C ) 8
37
D ( C ) 7
46
38
D ( C ) 6
MODE0
( B )
I
BIAS
45
39
D ( C ) 5
MODE1
EXTCLP
40
D ( C ) 4
CLK
56
41
CLK
D ( C ) 3
CLPEN
57
42
D ( C ) 2
CLPEN
XSYNC
55
43
D ( C ) 1
EXTCLP
( A )
I
BIAS
3
NT/PAL
4
TEST
( A )
V
RT
58
XSYNC
( A )
DD
V
( A )
IN
59
( A )
I
BIAS
GND ( A )
54
I
( B )
BIAS
27
( C )
I
BIAS
13-6
DATA
8
8
8
LATCH
8
8
24-17
DATA
8
8
LATCH
8
OUTPUT
FORMAT
8
MULTIPLEXER
43-36
DATA
8
8
8
8
LATCH
8
OUTPUT
FORMAT
CLOCK
SELECT/
GENERATOR
TEST
SELECT
INPUT
CLK
; CLOCK
CLPEN
; CLAMP ENABLE FOR INTERNAL CLAMP CIRCUIT
CLPV ( A ) - CLPV ( C )
; CLAMPING LEVEL OF ADC
EXTCLP
; EXTERNAL CLAMP PULSE
MODE0, MODE1
; OUTPUT FORMAT MODE SELECT
; NTSC/PAL CONTROL ( NTSC = 0, PAL = 1 )
NT/PAL
OE ( A ) - OE ( C )
; OUTPUT ENABLE OF DATA
TEST
; TEST = 1, DEVICE = 0
( A ) - V
( C )
V
; ANALOG INPUT OF ADC
IN
IN
( A ) - V
( C )
V
; REFERENCE VOLTAGE BOTTOM OF ADC
RB
RB
( A ) - V
( C )
V
; REFERENCE VOLTAGE TOP OF ADC
RT
RT
XSYNC
; OUTPUT SYNCHRONOUS
OUTPUT
D ( A ) 1 - D ( A ) 8
; DATA OUTPUT OF ADC A
D ( B ) 1 - D ( B ) 8
; DATA OUTPUT OF ADC B
D ( C ) 1 - D ( C ) 8
; DATA OUTPUT OF ADC C
OTHER
DGND
; DIGITAL GROUND
DGND ( QA ) - DGND ( QC )
; DIGITAL GROUND FOR OUTPUT OF ADC
GND ( A ) - GND ( C )
; GROUND OF ADC
I
( A ) - I
( C )
; CLAMPING BIAS CURRENT OF ADC
BIAS
BIAS
AV
( A ) - AV
( C )
; ANALOG V
OF ADC
DD
DD
DD
DV
; DIGITAL V
DD
DD
DV
( QA ) - DV
( QC )
; DIGITAL V
FOR OUTPUT OF ADC
DD
DD
DD
0
; LOW LEVEL
1
; HIGH LEVEL
D ( A ) 1-D ( A ) 8
D ( B ) 1-D ( B ) 8
D ( C ) 1-D ( C ) 8
46
MODE0
45
MODE1
4
TEST
DSR-1/1P/V2
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