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INPUT
39
98
ERRF
256CK
256CK
37
41
LRCI
LRCO
ACS
40
36
BCKI
BCKO
ATT
17
42
MUTE
LSBO
BCKI
44
43
DATI
DATO
DATI
5
DSP
FLTT
92
INT
6
FLTA
FLTA
FLTT
12
11
STRT
OTEN
JDAT
15
14
SFDP
SFDR
JRDY
79
20
CS
LRCI
BC
49
OE
21
MUTE
TCK
55
22
WE
P-SAVE
TDI
23
67
RST
TENA1
AO00
24
66
SCK
TDO
AO01
65
SFDP
AO02
25
VST
64
SPSI
AO03
89
TSTM
62
STRT
AO04
90
TSAD
61
TRCK
AO05
60
TSAD
AO06
8
TRCK
59
TSTM
AO07
4
TTCK
53
TTCK
AO08
52
VST
AO09
78
AO10
48
OUTPUT
AO11
58
ATC
AO12
54
ATLT
AO13
56
AO00 - AO14
AO14
BCKO
68
D00
CS
69
D01
PBON
71
D02
DATO
72
D03
DIIN
73
D04
DSPO
74
D05
DV32
75
D06
EMPA
80
D07
ERRF
93
81
ERS
JRDY
PRST
94
82
FSE1 ,FSE2
PCEZ
JDAT
83
HEN
VEN
84
INT
HEN
85
LRCO
ERS
86
LSBO
SLMX
87
OE
SLVX
91
OTEN
DV32
PCEZ
32
29
SPSO
ACS
PRST
28
33
SPSI
FSE2
SFDO
27
34
SCK
FSE1
SLVX
16
35
P-SAVE
EMAP
SLXM
30
2
DSP
PBON
SPSO
31
3
ATT
DIIN
TBIS
18
46
RST
ATC
TNOM
47
ATLT
TSTN
45
DSPO
VEN
WE
INPUT/OUTPUT
D00 - D07
TSCK
TSDA
TSG
DSR-1/1P/V2
; 256fs CLOCK INPUT
; COMMUNICATION CHIP SELECT (L = ACTIVE) INPUT
; AUTO ATTENUATION INTERFACE CHIP SELECT INPUT
; 64fs INPUT
; AUDIO DATA INPUT
; ADSP INTERFACE CHIP SELECT INPUT
; FRAME SIGNAL FOR RECORDING INPUT
; FRAME SIGNAL FOR TRANSMISSION AND PLAYBACK INPUT
; EXTERNAL DEVICE INTERFACE INPUT
; EXTERNAL DEVICE INTERFACE INPUT
; fs CLOCK INPUT
; DIRECT MUTE INPUT (L = MUTE)
; POWER SAVE INPUT (L = POWER SAVE)
; RESET INPUT (L = RESET)
; SYSTEM CLOCK INPUT
; PLAYBACK DATA INPUT
; COMMUNICATION DATA INPUT
; REC/PB DATA COMMUNICATION START PULSE INPUT
; MAIN CLOCK INPUT (NTSC = 18.1259MHz, PAL = 18.144MHz)
; FOR TEST
; FOR TEST
; AUTO ATTENUATION AND ADSP INTERFACE CLOCK INPUT
; FOR TEST
; AUTO ATTENUATION INTERFACE CLOCK OUTPUT
; AUTO ATTENUATION INTERFACE LATCH PULSE OUTPUT
; EXTERNAL RAM ADDRESS OUTPUT
; 64fs OUTPUT
; EXTERNAL RAM CHIP SELECT SIGNAL OUTPUT
; MICROCOMPUTER INTERFACE SERIAL/PARALLEL OUTPUT (WORD2/BIT0)
; AUDIO DATA OUTPUT
; MICROCOMPUTER INTERFACE SERIAL/PARALLEL OUTPUT (WORD2/BIT1)
; ADSP INTERFACE CLOCK OUTPUT
; EXTERNAL DEVICE INTERFACE OUTPUT
; MICROCOMPUTER INTERFACE SERIAL/PARALLEL OUTPUT (WORD2/BIT3)
; PB AUDIO DATA ERROR ID SIGNAL OUTPUT
; EXTERNAL DEVICE RESET OUTPUT
; MICROCOMPUTER INTERFACE SERIAL/PARALLEL OUTPUT (WORD2/BIT4, 5)
; EXTERNAL DEVICE INTERFACE OUTPUT
; PHASE COMPARATOR CLOCK OUTPUT
; fs OUTPUT
; AUDIO DATA OUTPUT (LSB FIRST)
; EXTERNAL RAM OUTPUT ENABLE SIGNAL OUTPUT
; ENABLE OUTPUT FOR RECORDING DATA TRANSMISSION
; EXTERNAL DEVICE INTERFACE OUTPUT
; EXTERNAL DEVICE INTERFACE OUTPUT
; RECORDING DATA OUTPUT
; EXTERNAL DEVICE INTERFACE OUTPUT
; EXTERNAL DEVICE INTERFACE OUTPUT
; COMMUNICATION DATA OUTPUT
; FOR TEST
; FOR TEST
; FOR TEST
; EXTERNAL DEVICE INTERFACE OUTPUT
; EXTERNAL RAM WRITE ENABLE SIGNAL OUTPUT
; EXTERNAL RAM DATA INPUT/OUTPUT
; FOR TEST
; FOR TEST
; FOR TEST
LEVEL METER
BLOCK
17
MUTE
98
ERRF
A/D, D/A
INTERFACE
MUTE BUS
BLOCK
44
DATI
43
DATO
42
LSBO
SELF-CHECK
BLOCK
REC
BLOCK
67-64, 62-59, 53, 52, 78
48, 58,
54, 56
AD00 - AD14
68, 69
ADDRESS BUS
71-75,
80
D00 - 07
RAM
INTERFACE
DATA BUS
BLOCK
79
CS
49
OE
55
WE
D2912
93
D2913
JRDY
INTERFACE
94
JDAT
BLOCK
18
RST
RESET
PEAK
90
TSAD
89
TSTM
25
VST
MUTE
8
BLOCK
TRCK
4
TTCK
PB
92
INT
BLOCK
5
FLTT
6
FLTA
12
STRT
14
SFDP
CXD2187R
INTERFACE
11
BLOCK
OTEN
15
SFDR
MICROCOMPUTER
INTERFACE
BLOCK
IC
14-15
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