Sony DSR-1 Service Manual page 132

IC
CXD2304R-T4 (SONY)
C-MOS 8-BIT RGB SIGNAL D/A CONVERTER
–TOP VIEW–
37
38
39
40
41
42
43 A-V
DD(+3.3V)
44 A-V
DD(+3.3V)
45 A-V
DD(+3.3V)
46 A-V
DD(+3.3V)
47 D-V
DD(+3.3V)
48 D-V
DD(+3.3V)
R0 - R7 ; DIGITAL INPUTS
G0 - G7 ; DIGITAL INPUTS
B0 - B7 ; DIGITAL INPUTS
BLK ; BLANKING INPUT
VB ; EXTERNAL CAPACITOR FOR BIAS VOLTAGE GEN
RCK ; CLOCK INPUT
GCK ; CLOCK INPUT
BCK ; CLOCK INPUT
CE ; CHIP ENABLE INPUT
IREF ; REFERENCE CURRENT SOURCE INPUT
VREF ; REFERENCE VOLTAGE INPUT
VG ; EXTERNAL CAPACITOR FOR CURRENT CELLS INPUT
1
R0
2
R1
3
R2
4
R3 DECODER
5
R4 LATCHES
6
R5
7
R6 DECODER
8
R7
9
G0
10
G1
11
G2
12
DECODER
G3
13
G4 LATCHES
14
G5
15
G6 DECODER
16
G7
17
B0
18
B1
19
B2
20
B3 DECODER
21
B4 LATCHES
22
B5
23
DECODER
B6
24
B7
25
BLK
14-18
1
R0
2
R1
3
R2
4
R3
24
R OUT
5
R4
23
R OUT
6
R5
22
7
R6
21
8
R7
20
27
RCK
19
9
18
G0
10
17
G1
11
16
G2
12
15
G3
13
14
G4 G OUT
14
13
G5 G OUT
15
G6
16
G7
28
GCK
17
B0
18
B1
19
B2
B OUT
20
B3
B OUT
21
B4
22
B5
23
B6
24
B7
29
BCK
34
VREF
35
IREF
42
VG
32
VB
CE BLK
26 25
2LSB´S
CURRENT
CELLS
36
R OUT
6MSB´S 37
R OUT
CURRENT
CELLS
27
RCK
CLOCK GEN
2LSB´S
CURRENT
CELLS
38
G OUT
6MSB´S 39
G OUT
CURRENT
CELLS
28
GCK
CLOCK GEN
2LSB´S
CURRENT
CELLS
41
B OUT
6MSB´S 40
B OUT
CURRENT
CELLS
29
BCK
CLOCK GEN 42
VG
34
VREF
+
CURRENT CELLS
(FOR FULL SCALE) –
36
IREF
BIAS VOLTAGE
32
VB
GENERATOR
26
CE
CXD2310AR-T4 (SONY)
C-MOS 10-BIT 20MSPS VIDEO A/D CONVERTER
—TOP VIEW—
36
37
TSTR 37
AT 38
S/H
VIN 39
AMP.
40 NC
38
CAL 41
39
TS 42
43 AGND
44 AGND
41
45 DV
DD
40
(+3V)
46 NC
47 NC
48 DGND
FINE LATCH
29 12
VRT D9
30 11
VRT D8
39 10
VIN D7
34 9
VRB D6
35 8
VRB D5
41 5
CAL D4
17 4
SEL D3
15 3
RESET D2
24 2
CE D1
23 1
OE D0
22
CLK
14 13
TIN
TO
37 38
TSTR AT
42
TS
INPUT
CAL ; CALIBRATION PULSE INPUT
CE ; CHIP ENABLE
CLK ; CLOCK
LINV ; OUTPUT (D0-D8) INVERSION
MINV ; OUTPUT (D9) INVERSION
OE ; DIGITAL DATA OUTPUT ENABLE
RESET ; CALIBRATION CIRCUIT RESET
SEL ; OUTPUT DATA (D5-D9) SELECT FOR CALIBRATION (4-CLOCK)
HIGH; THROUGH OUTPUT,
TIN ; TEST SIGNAL INPUT
TMOD ; TEST MODE
TS ; TEST SIGNAL INPUT
TSTR ; TEST SIGNAL INPUT
VRB ; REFERENCE BOTTOM VOLTAGE
VRT ; REFERENCE TOP VOLTAGE
OUTPUT
AT ; TEST SIGNAL OUTPUT
D0-D9 ; DIGIRAL DATA OUTPUT
TO ; TEST PIN
COURSE
CONPARATE
& ENCODE
TIMING
GEN.
+
–
+
DAC
AMP.
(x 8)
FINE
COMPARATE
& ENCODE
COURSE CORRECTION
& LATCH
LOW; DATA FIXED AS WITH D0-D4
24 CE
23 OE
22 CLK
21 MINV
20 LINV
19 TMOD
AV 18
DD
(+5V)
17 SEL
DGND 16
15 RESET
14 TIN
13 TO
DSR-1/1P/V2