Power Supply - Espressif Systems ESP32-S2 Hardware Design Manuallines

3. PCB Layout Design
Figure 12: Keepout Zone for ESP32­S2 Module's Antenna on the Base Board
If there is base board under the antenna area, it is recommended to cut it off to minimize its impact on the antenna.
When designing an end product, pay attention to the impact of enclosure on the antenna.

3.3 Power Supply

• Four-layer PCB design is recommended over two-layer design. Route the power traces on the fourth (bottom)
layer whenever possible. Vias are required for the power traces to go through the layers and get connected
to the pins on the top layer. There should be at least two vias if the main power traces need to cross layers.
The drill diameter on other power traces should be no smaller than the width of the power traces.
• The 3.3 V power traces, highlighted in yellow, are routed as shown in Figure 13. The width of the main power
traces should be at least 25 mil. The width of the power traces for pin3 and pin4 should be at least 20 mil.
The width of other power traces is preferably 10 mil.
• As shown in Figure 13, an ESD protection diode is placed close to the power port (marked in red circle). A
10 µF capacitor is required before the power trace connects the ESP32-S2 chip, to be used in conjunction
with a 0.1 µF capacitor. Then the power traces are divided into two ways from here and form a star-shape
topology, thus reducing the coupling between different power pins. Note that all decoupling capacitors
should be placed close to the power pin, and ground vias should be added adjacent to the ground pin for
the decoupling capacitors to ensure a short return path.
• The power supply for the PA is provided by pin3 and pin4. It is required to add GND isolation between this
power trace and the GPIO traces on the left, and place ground vias as much as possible.
• The ground pad at the bottom of the chip should be connected to the ground plane through at least nine
ground vias.
Note:
If you need to add a thermal pad EPAD under the chip on the bottom of the module, it is recommended to employ a
nine-grid on the EPAD, cover the gaps with ink, and place ground vias in the gaps, as shown in Figure 13. This can avoid
tin leakage when soldering the module EPAD to the substrate.
Espressif Systems
Base Board
12
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Clearance
15 mm
15 mm
15 mm
ESP32-S2 Hardware Design Guidelines V1.1