Voltage Rails - 96Boards WinLink E850 Hardware User Manual

Voltage Rails

Circuit Type Net Name
Sys.BUCK V_SYS
BUCK1_PMIC
BUCK2_PMIC
BUCK3_PMIC
VLDO1_PMIC
VLDO2_PMIC
VLDO3_PMIC
VLDO4_PMIC
_CLK PMIC
VLDO5_PMIC
VLDO6_PMIC
VLDO10_PMIC
VLDO11_PMIC
VLDO14_PMIC
VLDO24_PMIC
VLDO25_PMIC
VLDO27_PMIC
VLDO28_PMIC
VLDO30_PMIC
VLDO32_PMIC
VLDO35_PMIC
PWR2_D
PWR3_D
VLDO14_PMIC
Other
VOUT
SYS_DCIN
WinLink
E850-96Board
Default ON
Iout Max
(mA)
Voltage(V)
5 8000
0.75 1500
0.75 4000
0.75 3000
0.75 300
1.8 450
0.85 300
1.8 150
1.1 800
0.6 600
1.8 150
3.0 150
1.8 450
3.0 800
1.8 150
3.0 180
1.8 150
1.8 150
3.3 300
1.8 150
5 500
5 500
1.8 450
5 8000
8-18 3000
Development Board Hardware User Guide
Connected Net(s)
System Power : 5V (MP2386 output)
VDD_CPU of Exynos 850
VDD_INT of Exynos 850
VDD_CP of Exynos 850,
VDD_WBG(WLBT : VDDQ18_WBG)
VDD075_ALIVE, VDD075_TCXO, VDD_ALV_CP, VDD075_USB20
VDDQ18_EXT , VDDQ18_ALIVE, VDDQ18_MMC_EMBD,
AVDD18_GPADC, VDDQ18_WBG, AVDD18_TCXO,
VDDP18_MMC_CARD, VDD1_MEM, VDD_EMMC_1P8,
VDD18_I2C, VDDQ18_PERI, VDD18_IO_WLBT, AVDD18_USB20
VDD085_OTP, VDD085_PLL_CPUCL0, VDD085_PLL_CPUCL1,
VDD085_PLL_SHARED, VDD085_PLL_AUD,
VDD085_PLL_DDRPHY0/1,
VDD085_PLL_G3D, VDD085D_PLL_SHARED, VDD085D_PLL_AUD,
AVDD085_MIPI_CSI_DPHY, AVDD085_MIPI_DSI_DPHY
AVDD18_PLL_CPUCL0/1, AVDD18_PLL_AUD,
AVDD18_PLL_SHARED, AVDD18_PLL_G3D,
AVDD18_MIPI_CSI_DPHY, AVDD18_MIPI_DSI_DPHY,
AVDD18_PLL_DDRPHY0/1, AVDD18_OTP, AVDD18_AUD_DET
VDD2_MEM,
VDDQ11_DRAM0_CKE, VDDQ11_DRAM1_CKE
VDDQ_MEM, VDDQ06_DRAM0, VDDQ06_DRAM1,
VDDQ06_DRAM0_CLK, VDDQ06_DRAM1_CLK
VDDQ1833_MMC_CARD
AVDD33_USB20
AVDD18_CP, AVDD18_WLBT, AVDD18_HSCON, AVDD18_MUSB
AVDD18_HSCON@HS_CON(J4, #60), LSCON(J5, #35)
VDD_LAN
VDD_T_FLASH_3V0
MIPI_SWITCH_3V3
HDMI_CONV_1V8
NPU_VDD18
CAM_VDD
DLDO_CORE_1P8
USB host1 output power protection(P2)
USB host2 output power protection(P3)
1.8V on LS connector(#35)
5V output of System BUCK(MP2386)
8-18V DCIN on LS connector(#36, #38)
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