ABB Relion 650 Series Product Manual page 27

Transformer protection RET650
Version 2.2
The trip function can collect start and directional signals
from different application functions. The aggregated start
and directional signals are mapped to the IEC 61850 logical
node data model.
General start matrix block SMAGAPC
The Start Matrix (SMAGAPC) merges start and directional
output signals from different application functions and
creates a common start and directional output signal
(STDIR) to be connected to the Trip function.
The purpose of this functionality is to provide general start
and directional information for the IEC 61850 trip logic data
model SMPPTRC.
Trip matrix logic TMAGAPC
The 12 Trip matrix logic (TMAGAPC) function each with 32
inputs are used to route trip signals and other logical output
signals to the tripping logics SMPPTRC and SPTPTRC or to
different output contacts on the IED.
The trip matrix logic function has 3 output signals and these
outputs can be connected to physical tripping outputs
according to the specific application needs for settable
pulse or steady output.
Group alarm logic function ALMCALH
The group alarm logic function (ALMCALH) is used to route
several alarm signals to a common indication, LED and/or
contact, in the IED.
Group warning logic function WRNCALH
The group warning logic function (WRNCALH) is used to
route several warning signals to a common indication, LED
and/or contact, in the IED.
Group indication logic function INDCALH
The group indication logic function (INDCALH) is used to
route several indication signals to a common indication,
LED and/or contact, in the IED.
Basic configurable logic blocks
The basic configurable logic blocks do not propagate the
time stamp and quality of signals. The list below shows a
summary of the function blocks and their features.
The logic blocks are available as a part of an extension
logic package. The list below is a summary of the function
blocks and their features.
• AND function block. The AND function is used to form
general combinatory expressions with boolean variables.
The AND function block has up to four inputs and two
outputs.
• GATE function block is used for whether or not a signal
should be able to pass from the input to the output.
• INVERTER function block that inverts the input signal to
the output.
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• LLD function block. Loop delay used to delay the output
signal one execution cycle.
• OR function block. The OR function is used to form
general combinatory expressions with boolean variables.
The OR function block has up to six inputs and two
outputs. One of the outputs is inverted.
• PULSETIMER function block can be used, for example,
for pulse extensions or limiting of operation of outputs,
settable pulse time.
• RSMEMORY function block is a flip-flop that can reset or
set an output from two inputs respectively. Each block
has two outputs where one is inverted. The memory
setting controls if, after a power interruption, the flip-flop
resets or returns to the state it had before the power
interruption. RESET input has priority.
• SRMEMORY function block is a flip-flop that can set or
reset an output from two inputs respectively. Each block
has two outputs where one is inverted. The memory
setting controls if the block's output should reset or return
to the state it was, after a power interruption. The SET
input has priority if both SET and RESET inputs are
operated simultaneously.
• TIMERSET function has pick-up and drop-out delayed
outputs related to the input signal. The timer has a
settable time delay and must be On for the input signal to
activate the output with the appropriate time delay.
• XOR is used to generate combinatory expressions with
boolean variables. XOR has two inputs and two outputs.
One of the outputs is inverted. The output signal OUT is 1
if the input signals are different and 0 if they are the
same.
Fixed signal function block FXDSIGN
The Fixed signals function (FXDSIGN) has nine pre-set
(fixed) signals that can be used in the configuration of an
IED, either for forcing the unused inputs in other function
blocks to a certain level/value, or for creating certain logic.
Boolean, integer, floating point, string types of signals are
available.
One FXDSIGN function block is included in all IEDs.
Elapsed time integrator with limit transgression and
overflow supervision TEIGAPC
The Elapsed time integrator function (TEIGAPC) is a
function that accumulates the elapsed time when a given
binary signal has been high.
The main features of TEIGAPC
• Applicable to long time integration (≤999 999.9 seconds).
• Supervision of limit transgression conditions and overflow.
• Possibility to define a warning or alarm with the resolution
of 10 milliseconds.
• Retaining of the integration value.
• Possibilities for blocking and reset.
• Reporting of the integrated time.
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