3.6.3.2.1.3 PCI Express Root Port 5(M.2 KeyE)
Item
PCI Express Root Port 5(M.2
KeyE)
ASPM
L1 Substates
PTM
PCIe Speed
Option
Enabled[Default],
Control the PCI Express Root Port.
Disabled
Disabled[Default],
Set the ASPM Level: Force L0s – Force all
L0s
links to L0s State AUTO – BIOS auto
L1
configure DISABLE – Disables ASPM.
L0sL1
Auto
Disabled[Default],
L1.1
PCI Express L1 Substates settings.
L1.1 & L1.2
Disabled[Default]
Enable/Disable Precision Time
Enabled
Measurement.
Auto[Default]
Gen1
Configure PCIe Speed.
Gen2
Gen3
ARC-1235 Quick Reference Guide 65
Quick Reference Guide
Description