Linear Technology DC102 Demo Manual page 2

DEMO MANUAL DC102
50V N-CHANNEL HALF BRIDGE
PACKAGE AND SCHEMATIC DIAGRAMS
E3
V
IN
10V TO 15V
1/4W, 5%
R1
+
C1
24k
10µF
1/4W
25V
5%
E4
UVOUT
E5
INTOP
E6
INBOTTOM
E7
GND
*T1 = CTX100-1P
BOLD LINES INDICATE
HIGH CURRENT PATHS
FOR BOOST TOPOLOGY REPLACE COMPONENTS IN DASHED AREA WITH THE INDUCTOR AS SHOWN IN FIGURE 2
+
C1
10µF
25V
E3
V
IN
10V TO 15V
E5
INTOP
E6
INBOTTOM
E4
UVOUT
E7
GND
2
D2
1N4148
R2,2Ω
R7
C9
6.2k
C11
1000pF
1/4W
0.1µF
D3
25V
5%
50V
1N4148
1
I SW
SENSE
2
+
SV SWGND
3
INTOP BOOST
4
INBOTTOM TGATEDR
U1
LT1336
5
UVOUT TGATEFB
6
SGND TSOURCE
7
+
PGND PV
8
BGATEFB BGATEDR
Figure 1. Demonstration Circuit with a Flyback HIgh-Side Driver Regulator
1N4148
L1*
R2
200µH
2Ω
1/4W
5%
1
I
SENSE
2
+
SV
3
INTOP
4
INBOTTOM
U1
R1, 24k
LT1336
1/4W, 5%
5
UVOUT
6
SGND
7
PGND
8
BGATEFB
BOLD LINES INDICATE HIGH CURRENT PATHS
* SUMIDA RCH-664D-221 KC
Figure 2. Demonstration Circuit with a Boost High-Side Driver Regulator
T1*
D1
1N4148
16
15
14
13
C2
R3
12 1µF
10Ω
25V
1/4W
11
5%
Q1
10
MTP50N06V
9
R5
D5
10Ω
1N5819
1/4W
5%
Q3
MTP50N06V
D2
L1 REPLACES THE DASHED
COMPONENTS IN FIGURE 1
D1
16 1N4148
SW
15
SWGND
14
BOOST
13
TGATEDR
+
C2
R3
1µF
12
10Ω
TGATEFB
25V
1/4W
11
5%
TSOURCE
10
+
PV
9
BGATEDR
R5
D5
10Ω
1N5819
1/4W
5%
TOP VIEW
I
SENSE
+
SV
INTOP
INBOTTOM
UVOUT
SGND
PGND
BGATEFB
N PACKAGE
16-LEAD PDIP
LT1336CN
E1
HV
0V TO 50V
R4
10Ω
C3 TO C8
+
1/4W
330µF
5%
Q2
63V
MTP50N06V × 6
E2
OUT
R6
10Ω
1/4W
5%
Q4
MTP50N06V
DM102A • F01
R4
10Ω
+
1/4W
5%
Q2
MTP50N06V
Q1
MTP50N06V
R6, 10Ω
1/4W
5%
Q4
MTP50N06V
Q3
MTP50N06V
DM102A • F02
SW
SWGND
BOOST
TGATEDR
TGATEFB
TSOURCE
+
PV
BGATEDR
E1
HV
0V TO 40V
C3 TO C8
330µF
63V
× 6
E2
OUT