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SPECIFICATIONS AND PIN INFORMATION
Pin
PB2
PA0
Deep Sleep Wake
PA0
Interrupt Limitations
Due to the processor's architecture, only one port of the same number (e.g. PA_1, PB_1, PC1, etc) may be
configured as an Interrupt source. If you configure multiple ports of the same number as an Interrupt source, only
the last one configured will actually trigger an interrupt in the processor. The rest will be ignored.
Note:
The LoRa radio uses interrupts 1, 6, 7, 8, and 13. Do not configure these as external interrupts. Doing so
breaks the LoRa functionality and causes undefined behavior.
For example, if you configure the WAKE (PA_0) pin to wake the xDot from low power modes and then you cannot
configure GPIO2 (PB_0) as an Interrupt source. If you do so, the WAKE pin will not wake the xDot as desired.
For more information about this, refer to the ST RM0038 Reference Manual at
https://www.st.com/content/st_com/en/search.html#q=RM0038-t=resources-page=1
28
Description
GPIO3
Wake
Wake
®
xDot
Developer Guide for Japan
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