Texas Instruments Jacinto7 TDA4VE-Q1 User Manual

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User's Guide
Jacinto7 TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 Evaluation
Module (EVM)
1 Introduction.............................................................................................................................................................................3
1.1 Inside the Box....................................................................................................................................................................
1.2 Key Features......................................................................................................................................................................3
1.3 Thermal Compliance..........................................................................................................................................................
1.4 Reach Compliance.............................................................................................................................................................4
1.5 EMC, EMI, and ESD Compliance......................................................................................................................................
2 User Interfaces........................................................................................................................................................................5
2.1 Power Inputs......................................................................................................................................................................
2.2 Power Input [J7_CP] with LED for Status [LD2_CP][LD3_CP]..........................................................................................
2.3 User Inputs.........................................................................................................................................................................9
2.4 Standard Interfaces..........................................................................................................................................................12
2.5 Expansion Interfaces........................................................................................................................................................14
3 Circuit Details........................................................................................................................................................................17
3.1 Top Level Diagram...........................................................................................................................................................
3.2 Interface Mapping............................................................................................................................................................
3.3 I2C Address Mapping.......................................................................................................................................................19
3.4 GPIO Mapping.................................................................................................................................................................
4 Revision History...................................................................................................................................................................
Figure 2-1. TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 System on Module Component
Figure 2-2. Jacinto7 Common Processor Component Identification...........................................................................................
Figure 2-3. RJ45 LED Indicators
Figure 2-4. Audio Port Interface Assignment [J38,J40B & J41B]..............................................................................................
Figure 3-1. EVM Functional Block diagram...............................................................................................................................
Table 1-1. REACH Compliance...................................................................................................................................................
Table 2-1. Recommended External Power Supply......................................................................................................................
Table 2-2. Power Domain Status.................................................................................................................................................
Table 2-3. Power Allocation.........................................................................................................................................................
Table 2-4. Dip Switch [SW3_CP] [SW13_CP] EVM Configuration Settings..............................................................................
Table 2-5. EVM Configuration Switch Function.........................................................................................................................
Table 2-6. Dip Switch [SW9] Configuration for
Table 2-7. Dip Switch [SW8] Configuration for BOOTMODE.....................................................................................................
Table 2-8. Reset Pushbuttons....................................................................................................................................................
Table 2-9. User Pushbuttons and LEDs.....................................................................................................................................
Table 2-10. UART to COM Port Mapping [J43] with Status
Table 2-11. UART to COM Port Mapping [J44] with Status [LD11]............................................................................................
Table 2-12. Fan Header Pin Definition [J15]..............................................................................................................................
Table 2-13. CAN-FD Interface
Table 2-14. CAN-FD Header Pin Definition...............................................................................................................................
Table 2-15. High Speed Camera Expansion Pin Definition
Table 2-16. Test Automation Interface Pin Definition [J50]........................................................................................................
Table 2-17. Accessory Power Connector
Table 3-1. EVM Interface Mapping Table
Table 3-2. I2C Mapping Table....................................................................................................................................................
Table 3-3. GPIO Mapping for Processor IO ..............................................................................................................................
SPRUJ69 - DECEMBER 2022
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Table of Contents

List of Figures
[J35].......................................................................................................................................13
List of Tables
MCU_BOOTMODE...........................................................................................11
[LD10]............................................................................................12
Assignment................................................................................................................................15
[J52]...............................................................................................15
[J42]..........................................................................................................................17
..................................................................................................................................19
Copyright © 2022 Texas Instruments Incorporated
Identification..............................................5
Jacinto7 TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 Evaluation Module (EVM)
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