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User's Guide
Jacinto7 EVM Quad Port Ethernet Expansion Board
User's Guide
1
Introduction.............................................................................................................................................................................2
Features......................................................................................................................................................................2
1.2 Thermal Compliance..........................................................................................................................................................
1.3 EMC, EMI, and ESD Compliance......................................................................................................................................
2.2 Interfacing QP-ENET Expansion Board with J7AHP EVM Board......................................................................................
3.1 QP-ENET Expansion Board Hardware Top Level Diagram...............................................................................................
3.2 Expansion Connectors.......................................................................................................................................................
3.3 Board ID EEPROM..........................................................................................................................................................
Interface.............................................................................................................................................................11
Appendix...............................................................................................................................................................................15
A.2 Appendix - II (QP-ENET Board GPIO Mapping).............................................................................................................
Trademarks
All trademarks are the property of their respective owners.
SPRUJ74 - OCTOBER 2022
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Table of Contents
Installation....................................................................................................................3
Identification........................................................................................................................3
Architecture............................................................................................................9
Mapping).....................................................................................................................................15
Copyright © 2022 Texas Instruments Incorporated
Jacinto7 EVM Quad Port Ethernet Expansion Board User's Guide
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Summary of Contents for Texas Instruments Jacinto7
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Page 1: Table Of Contents
A.2 Appendix – II (QP-ENET Board GPIO Mapping)......................Trademarks All trademarks are the property of their respective owners. SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 2: Introduction
The Jacinto7 EVMs are development and evaluation systems that enable developers to write software and develop hardware around the Jacinto7 family of processors. The main elements of the system are available on the EVM system itself. This gives developers the basic resources needed for most general-purpose type projects that encompass the Jacinto7 processor. -
Page 3: Qp-Enet Board Identification And Installation
2 QP-ENET Board Identification and Installation 2.1 QP-ENET Board Component Identification Figure 2-1. QP-ENET Expansion Board Component Identification SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 4: Interfacing Qp-Enet Expansion Board With J7Ahp Evm Board
J7AHP EVM. It is valid to support/install on only one QP-ENET board, and in either location. Figure 2-2. QP-ENET Expansion Board Bottom Side Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback... - Page 5 7. Add a M3 x 5mm spacer from the top side of the J7AHP EVM board to lock the other end of the M3 x12mm Phillips screw. SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 6 QP-ENET Board Identification and Installation www.ti.com Figure 2-4. QP ENET Board Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 7 QP-ENET Board Identification and Installation Figure 2-5. Bottom Side of J7AHP EVM Figure 2-6. Top Side of J7AHP EVM SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 8 QP-ENET Board Identification and Installation www.ti.com Figure 2-7. J7AHP EVM - QP ENET Board Assembly Procedure Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
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Page 9: Qp-Enet Expansion Board Hardware Architecture
Table 3-1. ENET Expansion Connector J3 Pinouts Net Name Net Name DGND QSGMII_INTN DGND QSGMII4_TX_P DGND QSGMII4_TX_N DGND QSGMII4_RX_P DGND QSGMII4_RX_N DGND QSGMII_PHY_REFCLK_N SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 10: Board Id Eeprom
Magic Number TYPE Fixed length and variable position board ID header Size of payload BRD_INFO TYPE Payload type Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... -
Page 11: Ethernet Interface
These board ID details are programmed on the EEPROM from the address 0x0h. 3.4 Ethernet Interface The Jacinto7 EVM – QP-ENET Expansion board provides an option for users to validate the Jacinto7 SoC’s SGMII controllers. The J7 EVM includes an SGMII connection between the VSC8514XMK Quad Port SGMII PHY and the network subsystem (NSS) of the processor. - Page 12 Quad port Ethernet Expansion Board is used to remove the address conflict by connecting any one of the clock generators. Figure 3-4. Clock Source I2C MUX Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback...
- Page 13 The Left LED gives speed and activity status; if LED is blinking or pulse-stretching it denotes link activity and if not then no activity. SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
- Page 14 By default, this signal has a pull-up on the EVM board, i.e. the PHY is in active state all the time unless low is asserted on this signal. Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide SPRUJ74 – OCTOBER 2022 Submit Document Feedback Copyright ©...
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Page 15: A Appendix
I2C GPIO GPIO Output EXPANDER2(U31.P23 EXPANDER2(U31.P23 EXPANDER2(U173.P23 , I2C0) , I2C0) , I2C0), I2C GPIO EXPANDER2(U173.P12 , I2C0), SPRUJ74 – OCTOBER 2022 Jacinto7 EVM Quad Port Ethernet Expansion Board User’s Guide Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated... - Page 16 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...
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