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♦ C0 coverage
Displays the accessed area of the program area and data area.
"Accessing" means fetching, reading, and writing.
♦ Break source
• Break by event detection
• Manual break
• Break by command
• Trace full break
• Fail-safe break
:
♦ Real-time trace
• Trace source
:
• Trace capacity :
• Traced contents :
Notes 1. Bus to fetch the program from or access data to the internal ROM or expansion memory, and to
access SFR data
2. Bus to access the CPU's internal RAM and data
♦ Target interface
Emulation probe (optional)
98
APPENDIX A SPECIFICATIONS
Non-map break
Write-protect break
SFR illegal access break
Illegal relocation break
All trace
Section trace
Qualify trace
32K bytes × 142 bits
Note 1
Main bus
:
Address :
Data
Status
Note 2
CPU internal bus
:
Address : 10 bits
Data
Status
Others
:
External sense data signal: 8 bits
Time tag: 24 bits
Others :
24 bits
:
16 bits
:
5 bits
:
32 bits
:
7 bits
15 bits
Selectable
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