Specifications; High Density Bidirectional Signal System; Pcie Signal System; Reference Clock - Tektronix TMT4 Specification And Performance Verification Technical Reference

Specifications

All specifications are typical.

High density bidirectional signal system

Number of lanes
Insertion loss budget, Mixed
mode
Supported protocols
Power capability

PCIe signal system

Absolute maximum input
voltage

Reference clock

Input characteristics
Input frequency
Absolute max input voltage
Absolute min input voltage
Peak - to - peak differential
input voltage
Output characteristics
1 The M.2 Edge adapter does not use the TMT4 cable in its setup.
TMT4 Margin Tester Specifications and Performance Verification
Supports 1, 4, 8, 16 lanes
8 GT/s and 16 GT/s channel insertion loss budget at Nyquist by system component:
Insertion loss component
TMT4 adapter
TMT4 cable adapter
CEM Edge x 1 adapter
CEM Edge x 4 adapter
CEM Edge x 8 adapter
CEM Edge x 16 adapter
CEM Slot x 16 adapter
1
M.2 Edge adapter
M.2 Slot adapter
U.2 Edge adapter
U.2 Slot adapter
U.3 Edge adapter
U.3 Slot adapter
PCIe generation 3 and 4 speeds
75 W of power through 3.3 V and 12 V lines per PCIe CEM specifications.
Maximum peak-to-peak differential input voltage V
PCIe compliant measured at TP2.
85 Ω differential system
PCIe compliant reference clock including 100 MHz common clock or SSC enabled (30 - 33 kHz)
1.15 V
- 0.3 V
0.3 V - 1.5 V
85 Ω differential source terminated system
At 4 GHz, Typical
1.4
1.4
0.5
0.5
0.5
0.5
7.1
1.6
7.5
1.3
5.3
1.1
5.4
input voltage: 1.2 V
ID
Specifications
At 8 GHz, Typical
2.6
3.0
1.5
1.5
1.5
1.5
13.5
3.5
13.5
1.9
10.0
1.6
10.0
9