Taiwan Commate Computer Inc. 370SMA User Manual page 17

This controls the latency between the SDRAM read command and the time that the data actually
becomes available.
3.4.2 SDRAM Cycle Time Tras/Trc
This feature controls the number of SDRAM clocks used per access cycle.
3.4.3 SDRAM RAS-to-CAS Delay
These are timing of SDRAM CAS Latency and RAS to CAS Delay, calculated by clocks. They are
important parameters affects SDRAM performance.
3.4.4 SDRAM RAS Precharge Time
The RAS Recharge means the timing to inactive RAS and the timing for DRAM to do Recharge
before next RAS can be issued.
3.4.5 System BIOS Cacheable
Allows the system BIOS to be cached for faster system performance.
3.4.6 Video BIOS Cacheable
Allows the video BIOS to be cached for faster video performance.
3.4.7 Memory Hole At 15M-16M
Enabling this feature reserves 15MB to 16MB memory address space to ISA expansion cards
that specifically require this setting. This makes the memory from 15MB and up unavailable to
the system. Expansion cards can only access memory up to 16MB.
3.4.8 Delayed Transaction
This function is used to meet the latency of PCI cycles to from ISA bus. Try to enable or disable
it, if you have ISA card compatibility problem.
3.4.9 On-Chip Video Windows Size
This feature allows you to select the size of mapped memory for AGP graphic data.
3.4.10 AGP Graphics Aperture Size (MB)
Choose 32, 64MB. Memory-mapped, graphics data structures can reside in the Graphics
Aperture.
3.4.11 System Memory Frequency
This field is used to select the System memory frequency. The 133MHz frequency can be
detected only when 133MHz FSB CPU is installed on board.
3.5 Integrated Peripherals
You can control Input and Output functions from this screen.
Figure 3-5 Integrated Peripherals
CMOS Setup Utility - Copyright ( C ) 1984 - 1999 Award Software
Integrated Peripherals