100Base-Tx Mii Receive Timing - 5B Bypass Align Mode - Cirrus Logic CS8952 Manual

100BASE-TX MII RECEIVE TIMING - 5B BYPASS ALIGN MODE

Parameter
RX_CLK Period
RX_CLK Pulse Width
RXD[4:0] setup to rising edge of RX_CLK
RXD[4:0] hold after rising edge of RX_CLK
Start of 5B symbol to symbol output on RX[4:0]
RX+/-
RXD[4:0],
RX_CLK
10
5B Mode
RX Symbol
RX Symbol
0
t
RLAT
t
P
t
t
WL
WH
Symbol Min
t -
P
t t -
WL, WH
t 10
SU
t 10
HD
t 5
RLAT
RX Symbol
N
N-1
t
t
SU
HD
RX Data RX Data
0 1
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
CS8952
Typ Max
40 -
20 -
- -
- -
- 9
IN
OUT
OUT
Unit
ns
ns
ns
ns
BT