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CS61880
Cirrus Logic CS61880 Manuals
Manuals and User Guides for Cirrus Logic CS61880. We have
1
Cirrus Logic CS61880 manual available for free PDF download: Manual
Cirrus Logic CS61880 Manual (22 pages)
Octal E1 Line Interface Evaluation Board
Brand:
Cirrus Logic
| Category:
Motherboard
| Size: 0 MB
Table of Contents
Table of Contents
2
Cdb61880 Evaluation Board Layout
4
Figure 1. CDB61880 Board Layout
4
Board Component Descriptions
5
Power Connections
5
Master Clock Selection
5
Figure 2. On-Board Logic Power Selection
5
Figure 3. Master Clock Selections
5
Operating Mode Selection
6
Line Interface Connections
6
TXOE Selection
6
Figure 4. Hardware/Host Mode Selection
6
Table 1. External Impedance Resistor Values
6
Table 2. Protection Resistor Selection
6
Clock Edge Selection
7
Jitter Attenuator Selection
7
Loopback Mode Selection
7
Figure 5. Transmitter Enable Selection
7
Figure 6. Clock Edge Selection
7
Figure 7. Jitter Attenuator Selection
7
Figure 8. Loopback Mode Selection
7
Line Length/Impedance Selection
8
Coder/Motorola/Intel Selection
8
Monitoring Address Selection
8
Mux/Non-Mux/Bits Clock Selection
8
Figure 9. Switch S9 Settings
8
Digital Signal Connections
9
LOS Indicators
9
JTAG Connection
9
Host Interface Connection
9
Host Setup Description
9
Figure 10. Digital Signal Control/Access
9
Table 3. Switch Settings for Host Mode
9
Host Software Interface
10
Starting the Software
10
Software Interface Buttons
10
Bit Indicator Description
10
Set All Button Description
10
Figure 11. CS61884 Software Opening Screen
10
Figure 12. Register Bit Box
10
Figure 13. Set All Button
10
Clear All Button Description
11
Write All Button Description
11
Read All Button Description
11
Write Button Description
11
Read Button Description
11
Program Exit Function
11
Figure 14. Clear All Button
11
Figure 15. Write All Button
11
Figure 16. Read All Button
11
Figure 17. Write Button
11
Cs61880 Configuration Screens
12
Choose Parallel Port Settings
12
Access and Configure the Read / Write Registers
12
Access Configuration Screens
12
Select Register to Configure
12
Figure 19. Opening Screen for Port and Address Selection Screen
12
Loopback /Bits Clock Screen
13
Figure 20. Loopback/G.703 Bits Clock Selection Screen
13
LOS/AIS/DFM/JA Register Screen
14
Figure 21. LOS/AIS/DFM/JA ERR Status/Enable Selection Screen
14
Transmitter Register Screen
15
Figure 22. Transmitter Register Screen
15
AWG Register Screen
16
Figure 23. AWG Registers Screen
16
Global Control Register Screen
17
Figure 24. Global Control Screen
17
Board Configurations
18
E1 75 Ω Mode Setup
18
Table 4. E1 75 Ω Operational Mode Switch/Jumper Position
18
E1 120 Ω Mode Setup
19
Table 5. E1 120 Ω Operational Mode Switch/Jumper Position
19
Evaluation Hints
20
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