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General Purpose I/O Header
The General Purpose Input/Output header at JGP1 is a general purpose I/O expander on
a pin header via the SMBus. Each pin can be configured to be an input pin or output pin in
2.54mm pitch. The GPIO is controlled via the PCA9554APW 8-bit GPIO expansion from PCH
SMBus. The base address is 0xEFA0. The expander slave address is 0x70 for WRITE and
0x71 for READ. See the table below for pin definitions.
JPL2
1
JAUDIO1
AUDIO FP
PCIe M.2-C
A
C
PCIe_M.2-M1
JGP1
COM12
COM34
COM56
Q670E
JBT1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
JSD1
USB6/7
USB4/5
(3.2(10Gb))
PWR_LED1
JSTBY1
FAN3
JTPM1
JLED1
JL1
JF1
JWD1
SLIMSAS
JGP1 Header
Pin Definitions
Pin#
Definition
1
+5V
2
GP0
3
GP1
4
GP2
5
GP3
6
GP4
7
GP5
8
GP6
9
GP7
10
Ground
HDMI/DP
USB9(3.2(20Gb))
USB8(3.2(20Gb))
LAN2
LAN1
JPL1
JVR1
CPU
MAC CODE
BAR CODE
ALWAYS POPULATE BLUE SOCKET FIRST
UNB NON-ECC DDR5 DIMM REQUIRED
BT1
(3.2(5Gb))
SP1
USB2/3
FAN2
JPW1
JD1
JD1:
1-4:SPEAKER
3-4:BUZZER
49
1. General Purpose Header
JPW2
BIOS
LICENSE
SMBUS1
Chapter 2: Installation
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