The Lo Synthesizer - Analog Devices AN-826 Application Note

AN-826

THE LO SYNTHESIZER

One local oscillator (LO) is required for this direct conversion
architecture. The up-conversion from dc to the wanted RF
frequency is directly achieved by the IQ modulator. Perform-
ances like phase noise, frequency resolution, and settling time
dictate the choice of a fractional-N synthesizer for the LO
generation.
Phase Noise
With the upconversion, phase noise is superimposed on each of
the N subcarriers of the WiMAX OFDM signal when mixed to
the local oscillator.
LO phase noise has two effects:
•
Random phase rotation for all subcarriers
•
Intercarrier interference resulting from the corruption of
a given subcarrier by its N-1 noisy adjacent subcarriers.
To help correct for these phase errors that contribute greatly
to the degradation of EVM, the OFDM symbol contains eight
subcarriers that are modulated with a known training sequence
of data. These training subcarriers are called pilot tones and
help the receiver track and remove most of the close-in phase
noise generated by the LO. However, this only allows the removal
of phase changes that are slower than a symbol period, while
phase changes that are faster than a symbol period are not
tracked and, therefore, affect EVM.
For a 64 QAM modulated OFDM, EVM requirements at the
transmitter output are very stringent at 3.1% rms. This is why the
PLL loop bandwidth, as well as the total integrated phase error,
is critical for the design of this PLL. A total phase error lower
than 1°rms has been used as a criteria for choosing a synthesizer.
With integer-N synthesizers, the N divider can be quite high
to synthesize >2.3 GHz RF frequencies while allowing for fine
resolution. Within the PLL loop bandwidth, both the reference
and phase frequency detector (PFD) noise levels are increased
by 20 × log(N). It directly degrades the PLL total phase error,
which can often be higher than 1°rms.
Fractional-N synthesizers are preferred for their inherent good
phase noise. Very small frequency resolution can be achieved
while using a higher comparison frequency, therefore helping
to reduce the total phase noise. The typical phase noise errors
for these fractional-N synthesizers can be <0.5°rms; which is
appropriate for this application.
The ADF4153 is a 4 GHz fractional-N synthesizer with three
modes available: low noise mode, low noise/low spur mode,
and low spur mode. The low noise mode is recommended for
narrow-loop filter bandwidths because the loop filter response
already attenuates the spurs. This is the case for WiMAX duplex
modes that do not require fast locking loops.
For fast loops, spurs are less attenuated because they fall inside
the loop bandwidth. In low spur mode, dither is enabled. This
randomizes the fractional quantization noise so it looks like
white noise, not spurious noise.
Synthesizer Frequency Resolution
The minimum required frequency resolution for the IQ
modulator LO is derived from the required channel raster
imposed by the 802.16 standard. As of today, the channel raster
requirement should be 250 kHz in most cases, and 200 kHz for
some specific profiles. This means that the carrier frequency
generated by the PLL should be at least a multiple of 250 kHz.
Reference Frequency
The following equations govern how a fractional-N synthesizer
is programmed:
RF = [INT + K/MOD] × [f
out
f
MOD =
REF
f
RES
where:
RF is the PLL synthesized frequency.
out
f is the reference frequency, also equal to the PFD
REF
comparison frequency in this case.
INT is the integer division factor.
K sets the value of the synthesized frequency fractionality.
MOD is the modulus.
f is the PLL frequency resolution.
RES
In fractional-N synthesizers, spurs appear at intervals of the chan-
nel spacing (fractional spurs) and possibly also at fractions of
the channel spacing (subfractional spurs). Table 1 shows how
the value of the modulus affects the location of subfractional spurs.
Table 1.
Conditions
If MOD is divisible by 2, not by 3
If MOD is divisible by 3, not by 2
If MOD is divisible by 6
Otherwise
From Equation 4, the modulus value (MOD) depends on the
PFD frequency and channel spacing. The channel spacing is
fixed, so if possible the PFD should be chosen such that the
modulus value does not produce subfractional spurs.
In addition, the reference frequency should be chosen high
enough to reduce the integer INT division ratio (see Equation 3).
A reference frequency greater than 10 MHz contributes to the
improvement of the PLL phase noise beyond that achievable
with an integer-N synthesizer.
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REF
Spur Interval
Channel step/2
Channel step/3
Channel step/6
Channel step
(3)
(4)