Dram Clock; Memory Hole; System Bios Cacheable; Video Ram Cacheable - MSI 694T Pro User Manual

DRAM Clock

The chipset support synchronous and asynchronous mode between
the host clock and DIMM clock.
Host CLK

Memory Hole

In order to improve performance, certain space in memory can be
reserved for ISA cards. This memory must be mapped into the memory
space below 16 MB.
Enabled
Disabled
P2C/C2P Concurrency
This item allows you to Enable or Disable the PCI to CPU, CPU to PCI
concurrency.
Fast R-W Turn Around
This item controls the DRAM timing. It allows the user to Enable or
Disable the fast read, write turn around. The settings are Enabled or
Disabled.

System BIOS Cacheable

Selecting Enabled allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result. The settings
are: Enabled and Disabled.

Video RAM Cacheable

Select Enabled allows caching of the video BIOS , resulting in better
system performance. However, if any program writes to this memory area, a
system error may result. The settings are: Enabled and Disabled.

AGP Aperture Size

Select the size of the Accelerated Graphics Port (AGP) aperture. The
aperture is a portion of the PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the aperture range are for
DIMM clock equal to host clock
Memory hole supported.
Memory hole not supported.
4-13
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AWARD BIOS Setup