Advertisement
AWARD BIOS
Chipset Features à 8 Bit I/O Recovery Time
8 Bit I/O Recovery
For some old I/O chips, after the execution of an I/O
Time
command, the device requires a certain amount of
time (recovery time) before the execution of the next
1
I/O command. Because of new generation CPU and
2
mainboard chipset, the assertion of I/O command is
3
faster, and sometimes shorter than specified I/O
4
recovery time of old I/O devices. This item lets you
5
specify the delay of 8-bit I/O command by count of
6
ISA bus clock. If you find any unstable 8-bit I/O card,
7
you may try to extend the I/O recovery time via this
8
item. The BIOS default value is 4 ISA clock. If set to
NA
NA, the chipset will insert 3.5 system clocks.
Chipset Features à 16 Bit I/O Recovery Time
16 Bit I/O Recovery
The same as 16-bit I/O recovery time. This item lets
Time
you specify the recovery time for the execution of 16-
bit I/O commands by count of ISA bus clock. If you
1
find any of the installed 16-bit I/O cards unstable, try
2
extending the I/O recovery time via this item. The
3
BIOS default value is 1 ISA clocks. If set to NA, the
4
chipset will automatically insert 3.5 system clocks.
NA
Chipset Features à Memory Hole At 15M-16M
Memory Hole At
This option lets you reserve system memory area for
15M-16M
special ISA cards. The chipset accesses code/data
of these areas from the ISA bus directly. Normally,
Enabled
these areas are reserved for memory mapped I/O
Disabled
card.
Chipset Features à Passive Release
Passive Release
This item lets you control the Passive Release
function of the PIIX4E chipset (Intel PCI to ISA
Enabled
bridge). This function is used to meet latency of ISA
Disabled
bus master. Try to enable or disable it, if you have
ISA card compatibility problem.
3-14
Advertisement
