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The SN65LVPE512 is a dual-channel, single lane USB 3.0 redriver and signal conditioner that supports
data rates of 5 Gbps. This document explains how to use the LVPE512 EVM to easily evaluate the
functionality of this device in various applications.
This EVM acts as a modifiable reference design for the SN65LVPE512 that allows this device to be used
in a wide variety of applications and configurations.
settings by using the switches on the EVM. Example applications for this device include notebooks,
desktops, docking stations, servers, and workstations. Schematics, printed-circuit-board (PCB) layout
images, and a bill of materials (BOM) for this module are included in this user's guide.
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Copyright © 2015, Texas Instruments Incorporated
SN65LVPE512 EVM
Table 1
explains how to modify these configuration
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SN65LVPE512 EVM

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Summary of Contents for Texas Instruments SN65LVPE512

  • Page 1: Table Of Contents

    5 Gbps. This document explains how to use the LVPE512 EVM to easily evaluate the functionality of this device in various applications. This EVM acts as a modifiable reference design for the SN65LVPE512 that allows this device to be used in a wide variety of applications and configurations.
  • Page 2: Introduction

    Introduction The SN65LVPE512 is a dual-channel, single lane USB 3.0 redriver and signal conditioner supporting data rates of 5 Gbps. The device complies with USB 3.0 specification revision 1.0, supporting electrical idle condition and low-frequency periodic signals (LFPS) for USB 3.0 power management modes.
  • Page 3: Pcb Construction

    This section contains the EVM board schematics and the PCB board layouts. EVM Board Schematics Figure 1 through Figure 4 illustrate the SN65LVPE512 EVM schematics. Figure 1. Schematic of High Speed Pins SLLU213 – February 2015 SN65LVPE512 EVM Submit Documentation Feedback...
  • Page 4: Schematic Of Eq Control Pins

    PCB Construction www.ti.com Figure 2. Schematic of EQ Control Pins Figure 3. Schematic of Device Control Pins SN65LVPE512 EVM SLLU213 – February 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 5: Schematic Of Power Pins

    PCB Construction www.ti.com Figure 4. Schematic of Power Pins SLLU213 – February 2015 SN65LVPE512 EVM Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 6: Evm Pcb Layout

    PCB Construction www.ti.com EVM PCB Layout Figure 5 through Figure 8 illustrate the SN65LVPE512 PCB layouts. Figure 5. PCB Layout of Top Layer Figure 6. PCB Layout Second Layer SN65LVPE512 EVM SLLU213 – February 2015 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 7: Pcb Layout Of Third Layer

    PCB Construction www.ti.com Figure 7. PCB Layout of Third Layer Figure 8. PCB Layout of Bottom Layer SLLU213 – February 2015 SN65LVPE512 EVM Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated...
  • Page 8: Evm Pcb Fabrication

    NOTE: In order to achieve the desired impedance, it is recommended that you consult your board manufacturer for their process and design requirements. EVM Bill of Materials Table 3 lists the SN65LVPE512 EVM BOM. Table 3. SN65LVPE512 EVM Bill of Materials Reference Value Digi-Key P/N PCB Footprint...
  • Page 9 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
  • Page 10 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 11 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 本開発キットは技術基準適合証明を受けておりません。 本製品のご使用に際しては、電波法遵守のため、以下のいずれかの措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・インスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
  • Page 12 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...
  • Page 13 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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