NELLCOR PURITAN BENNETT Symphony N-3000 Service Manual page 99

b. Processor
The processor for the UIF PCB is U3, a Motorola MC68331 IC. This processor
uses a 32-bit CPU and contains several submodules, including pulse-width
modulators, internal RAM, and a Queued Serial Module (QSM). The
processor also contains a non-multiplexed, data/address bus and input/output
timer pins.
The processor generates chip selects, address lines, data direction, and data
strobes for communicating with its peripherals over its bidirectional, 16-bit
data bus D15 through D0. The chip select outputs are /CSBOOT and /CS0
through /CS8. The address lines are A0 through A18. The data direction is
generated by U3 on R/W. The data strobe for indicating valid data is
generated on /DS. Using these control lines, the processor is capable of
reading from or writing to any of the peripherals attached to its data bus.
Data transfers are either 16-bit (D15 through D0) or 8-bit (D15 through D8).
A 32.679 kHz source clock signal for the processor is produced by stackbus
adapter U14 from crystal Y3. System clock frequency is chosen by software.
c. Processor Peripheral ICs
Processor U3 uses serial and parallel peripheral ICs.
The serial peripheral ICs communicate with the processor through the 68331
Queued Serial Module (QSM). These ICs are the Real Time Clock (RTC), the
Electrically Erasable Read Only Memory (EEROM) and the display
controllers located on the Display PCB.
The parallel peripheral ICs communicate with the processor through a non-
multiplexed data bus. The ICs are processor code PROM U10, processor
RAMs U13 and U23, Arcnet communications IC U6, digital-to-analog
converter U5, analog-to-digital converter U27, stackbus adapter U14, BQ2001
power management chip U20, and UART (Universal Asynchronous Receiver
Transmitter) U24.
Real Time Clock — The clock is a continuously running IC used by the
processor to maintain time and date information. When the N-3000 is not on,
the RTC is maintained by lithium backup battery BT1.
Electrically Erasable Read Only Memory — The EEROM is used by the
processor to store institutional defaults and system error code data.
Display Controllers — These controllers are used by the processor to
display data on the display board.
Processor Code PROM (U10) — The PROM contains the program that the
processor uses to perform the user interface and gateway functions for the
N-3000. Processor U3 address lines A1 through A17 are connected to PROM
addresses A0 through A16, allowing even word address access to the PROM.
To allow the use of either a 256K x 16 or 128K x 16 PROM at U10, Pin 43 of
U10 is connected to J10 Pin 2. On a 256K x 16 PROM, Pin 43 will be PROM
address A17. On a 128K x 16 PROM, Pin 43 will be an active high output
enable. Address line A18 from U3 is connected to J10 pin 1 and VDD is
connected to J10 pin 3. Attaching a jumper between J10 pins 1 and 2 will
connect U3 address line A18 to PROM address A17 to address all 256K words
in a 256K x 16 PROM. Connecting a jumper between J10 Pins 2 and 3 will
connect Pin 43 to VDD for the active hi output enable of a 128K x 16 PROM.
Technical Supplement
S-9