EVAL-AD5341DBZ User Guide
EVAL-AD5341DBZ
DAUGHTER BOARD
VDD
A
B
LK2
B A
LK1
Figure 13.
EVAL-MBnanoDAC-SDZ
+ C3
C2
10µF
0.1µF
VREF1
13
DB0
DB0
14
DB1
DB1
15
DB2
DB2
16
U1
DB3
DB3
17
DB4
DB4
18
AD5341BRUZ
DB5
DB5
19
DB6
DB6
20
DB7
DB7
6
4
CS
VOUT
CS
7
WR
WR
C1
8
DNP
GAIN
GAIN
9
CLR
10
LDAC
LDAC
11
PD
PD
1
CLR
HBEN
2
BUF
AGND
Figure 14.
EVAL-AD5341DBZ
Motherboard Bottom Side Routing
J1
AGND
1
2
3
4
DB6
5
6
DB7
7
8
DB8
9
10
DB9
11
12
DB10
13
14
DB11
15
16
CS
VOUT
VOUT_0
R1
DNP
Daughter Board Schematics
Rev. 0 | Page 9 of 12
J2
1
2
SDIN
LDAC
3
4
SDO
CLR
5
6
SCLK
PD
7
8
SYNC
GAIN
9
10
SCL
SDA
J4-1
J4-2
DB0
DB1
J4-3
DB2
DB3
DB4
J4-4
DB5
WR
J4-5
DGND
J4-6
J4-7
J4-8
UG-982
VOUT_0
VOUT_1
VOUT_2
VOUT_3
VOUT_4
VOUT_5
VOUT_6
VOUT_7
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