Ikegami HTM-1517R Service Manual page 24

VIDEO PROCESS BOARD
(1) Circuit Structure
<VIDEO System>
(a) YPbPr/RGB Analog Component Input
(b) RGB → YPbPr Matrix
(c) YPbPr BUS I/F
(d) Video Processing
(e) Aperture
(f) ABL Control
<SYNC System>
(a) External Sync Input
(b) Sync Separator
(c) PLL-VCO
(d) Sync Processing
(e) G1 Drive
<CONTROL System>
(a) Serial → Parallel Control
(2) Adjustment Method
* Unless otherwise indicated, Input signal is HDTV and connected to YPbPr analog component. For HDTV,
there is 100% color bar (SMPTE274M), and for SDTV there is SMPTE color bar.
* The figures are images and differ from the actual signals.
<VIDEO System (YPbPr signal adjustment)>
(a) VR201 [DC SET R-Y]
VR401 [DC SET Y]
VR601 [DC SET B-Y]
At the test points TP106 (R-Y)/TP306 (Y)/TP506 (B-Y), the pedestals of the signals and the potential of
the H.BLK are the same.
H.BLK
Adjust
(b) VR104 [R DC SET]
VR304 [G DC SET]
VR504 [B DC SET]
For the test points TP110 (R)/TP310 (G)/TP510 (B), H.BLK of the signals is adjusted to 0V.
Pedestal
Y signal
H.BLK
Adjust
H.BLK
Pedestal
Adjust
R-Y/B-Y signal
0V
1-B-13