Integrated Peripherals - EUPA AP0 User Manual

3-10 Integrated Peripherals

This option allows you to configure the I/O features.
On-Chip Primary IDE
Master PIO
Slave PIO
Master Ultra DMA
Slave Ultra DMA
On-Chip Secondary IDE
Master PIO
Slave PIO
Master Ultra DMA
Slave Ultra DMA
IDE HDD Block Mode
On-Chip USB Controller
Init Display First
Ali SOUND Controller
POWER ON Function
KBC clock source
Onboard FDC Controller
Ø
On-Chip Primary IDE
On-Chip Primary
IDE:
- Enabled
- Disabled
3-28
ROM PCI/ISA BIOS(2A6KL00B)
INTEGRATED PERIPHERALS
AWARD SOFTWARE, INC.
: Enabled Onboard UART Port 1
: Auto Onboard UART Port 2
: Auto UART2 Mode
: Disabled
: Disabled Onboard Parallel Port
: Enabled Parallel Port Mode
: Auto ECP Mode Use DMA
: Auto Onboard IrDA Port
: Disabled
: Disabled
: Disabled
: Disabled
: PCI Slot
: Disabled
ESC: Quit
:BUTTON ONLY F1: Help
F5: Old Values
: 8 MHz F6: Load BIOS Defaults
: Enabled F7: Load Setup Defaults
The chipset contains a PCI IDE interface with
support for two IDE channels. Select Enabled to
activate the primary IDE interface. Select Disabled
to deactivate this interface
AP0
: 3F8/IRQ4
: 2F8/IRQ3
: Normal
: 378/IRQ7
:
ECPPP1.9
: 3
: Disable
:Select Item
PU/PD/+/-: Modify
(Shift) F2:Color
USER'S MANUAL