Panasonic PV-DV101 Manual page 264

I/O CHART OF IC3201
Pin No. I/O Signal Name Description Pin No. I/O
1 I DVDD +1.8V 57
2 I DVDD +1.8V 58
3 - DVSS Ground 59
4 I XRST Reset : low 60
5 I ATFIN ATF input 61
6 - CS (Not used) 62
7 I AVDD(ADC) +2.5V 63
8 I PBIN PB data input (+) 64
9 I PBX PB data input (-) 65
10 - AVSS(ADC) Ground 66
11 - VCOREF VCO reference 67
12 - VCORP VCO reference resister 68
13 I AVDD(VCO) +2.5V 69
14 - AVSS(VCO) Ground 70
15 I VCOIN VCO input 71
16 I AVDD(SDAC) +2.5V 72
17 - AVSS(SDAC) Ground 73
18 I AVDD(TDAC) +2.5V 74
19 O OSO Offset output 75
20 O ATF0 ATF output 76
21 - AVSS(TFDAC) Ground 77
22 O FPO Frequency Phase out (+) 78
23 O FPO B Frequency Phase out (-) 79
24 - IREF DAC current reference 80
25 - IBIAS DAC bias current 81
26 I AVDD(FDA/PWM) +2.5V 82
27 O AGCCTL AGC control 83
28 - AVSS(PWM) Ground 84
29 O RECCUR Rec current control 85
30 I TRST Reset : low 86
31 I TMS Test mode of JTAG 87
32 I TCK Test clock of JTAG 88
33 O TDO Test data In of JTAG 89
34 I TDI Test data out of JTAG 90
35 O SPA Sample pulse for ATF 91
36 O HID1 Head switch pulse 1 92
37 I DVDD +1.8V 93
38 O HID2 Head switch pulse 2 94
39 O RECI Rec on/off control 95
40 - DVSS Ground 96
Rec data
41 O HSE 97
42 O PBH PB mode : high 98
43 I EQHLD Equalizer hold 99
44 O RECCTL Rec control 100
45 O RECCLK Rec clock 101
46 I DVDD +1.8V
102
47 O DriveCLK Drive clock 103
48 I CYLFG Cylinder FG head 104
49 I CYLPG Cylinder PG head 105
50 - DVSS Ground 106
51 I DVDD +1.8V 107
52 I/O ADM[0] Address/data 0 108
53 - DVSS Ground 109
54 I/O ADM[2] Address/data 2 110
55 I/O ADM[1] Address/data 1 111
56 - NC (Not used) 112
I/O CHART OF IC3202
Signal Name Description Pin No. I/O
I/O ADM[4] Address/data 4 1
I/O ADM[3] Address/data 3 2
I DVDD +1.8V 3
- DVSS Ground 4
I/O ADM[5] Address/data 5 5
I/O ADM[6] Address/data 6 6
I/O ADM[7] Address/data 7 7
I/O ADM[8] Address/data 8 8
I DVDD +1.8V 9
I/O ADM[9] Address/data 9 10
I/O ADM[10] Address/data 10 11
I/O ADM[11] Address/data 11 12
- DVSS Ground 13
I/O ADM[12] Address/data 12 14
I/O ADM[15] Address/data 15 15
I/O ADM[13] Address/data 13 16
I/O ADM[14] Address/data 14 17
I XRE Read enable 18
I AS Address strobe 19
I DVDD +1.8V 20
I XWEL Write enable 21
I XWEH Write enable 22
- DVSS Ground 23
I/O DBR[0] Digital Rec/PB data (0) 24
I/O DBR[1] Digital Rec/PB data (1) 25
I/O DBR[2] Digital Rec/PB data (2) 26
I/O DBR[3] Digital Rec/PB data (3) 27
- NC (Not used) 28
I ACKR Acknowledge for R10 29
O REQR Request of R10 30
I DVDD +1.8V 31
I CLK27A 27MHz clock 32
- DVSS Ground 33
- TSTDT[0] (Not used) 34
- TSTDT[2] (Not used) 35
- TSTDT[1] (Not used) 36
- TSTDT[3] (Not used) 37
- TSTDT[5] (Not used) 38
- TSTDT[4] (Not used) 39
- TSTDT[6] (Not used) 40
(Not used)
- TSTDT[7] 41
O TSTCKO (Not used) 42
I DVDD +1.8V 43
- DVSS Ground 44
I TSTCKI (Not used) 45
- TSTDT[8] (Not used)
46
- TSTDT[14] (Not used) 47
- TSTDT[11] (Not used) 48
- TSTDT[9] (Not used) 49
- TSTDT[10] (Not used) 50
- TSTDT[13] (Not used)
- TSTDT[12] (Not used)
- TSTMD (Not used)
- TSTDT[15] (Not used)
- SCANEI (Not used)
- NC (Not used)
Signal Name Description Pin No. I/O
- VSS Ground 51 I/O
I MON7 (Not used) 52 I
I MON6 (Not used) 53 I/O
I MON5 (Not used) 54 I/O
I MON4 (Not used) 55 I/O
I VCC +1.8V 56 I/O
I MON3 (Not used) 57 -
I MON2 (Not used) 58 I/O
I MON1 (Not used) 59 I/O
I MON0 (Not used) 60 I/O
- VSS Ground 61 I/O
I VCCA +3.0V 62 I
- GNDA Ground 63 I/O
I/O TPBN Transaction data B(-) 64 I/O
I/O TPBP Transaction data B(+) 65 I/O
I VCCA +3.0V 66 I/O
I/O TPAN Transaction data A(-) 67 -
I/O TPAP Transaction data A(+) 68 I/O
- TPBIAS Trabsactuib dias 69 I/O
- GNDA Ground 70 I
- R0 Current set 0 71 I
- R1 Current set 1 72 I
I VCCA +3.0V 73 I
- PLLFLT1 PLL filter 1 74 I
- PLLFLT0 PLL filter 0 75 I/O
I VDDPLL +3.0V 76 I/O
- VSSPLL Ground 77 I
I XI 24.576MHz clock 78 -
I PWRDN Power down 79 I/O
I XPRST Reset : low 80 O
O CNA PLANET cable connection information 81 I/O
I VCC +1.8V 82 O
O XINTP Interrupt 83 I
I XLRST Reset : low 84 I
I LREQ (Not used) 85 I
I SYSCLK (Not used) 86 I
- VSS (Not used) 87 -
I CTL1 (Not used) 88 O
I CTL0 (Not used) 89 I
I D7 (Not used) 90 I
I D6 (Not used) 91 I
I VCC +1.8V 92 I
I D5 (Not used) 93 I
I D4 (Not used) 94 I
I D3 (Not used) 95 I
I D2 (Not used) 96 I
- VSS Ground 97 I
I D1 (Not used) 98 I
I D0 (Not used) 99 I
I/O ADM15 Address/data 15 100 I
NOTE:
FOR SCHEMATIC DIAGRAM AND CIRCUIT BOARD LAYOUT NOTES/
ABBREVIATION, REFER TO BEGINNING OF SCHEMATIC SECTION.
Signal Name Description
ADM14 Address/data 14
VCC +1.8V
ADM13 Address/data 13
ADM12 Address/data 12
ADM11 Address/data 11
ADM10 Address/data 10
VSS Ground
ADM9 Address/data 9
ADM8 Address/data 8
ADM7 Address/data 7
ADM6 Address/data 6
VCC +1.8V
ADM5 Address/data 5
ADM4 Address/data 4
ADM3 Address/data 3
ADM2 Address/data 2
VSS Ground
ADM1 Address/data 1
ADM0 Address/data 0
F SCLK (Not used)
XRE Read enable
VCC +1.8V
XWEL Write enable
AS Address strobe
DBP3 Digital data for DV 3
DBP2 Digital data for DV 2
ACKP Acknowledge for PLANET
VSS Ground
DBP1 Digital data for DV 1
REQP Request of PLANET
DBP0 Digital data for DV 0
INF Input frame
VCC +1.8V
SSP Sector start pulse
ENSUS Suspend select ( Disenable"low",enable"high" )
XTRST Reset : low
VSS Ground
TDO Test data
FRP Frame pulse
TMS Test mode select
TCK Test clock
VCC +1.8V
TDI Test data
CLK27A 27MHz clock
VSS Ground
TEST3 (Not used)
TEST2 (Not used)
TEST1 (Not used)
TEST0 (Not used)
VCC +1.8V
COMPARISON CHART
OF MODELS & MARKS
MODEL MARK
PV-DV101 A
PV-DV401 B
Not Used Z