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1
* PCM1604Y-2
A
RST
37
SCKI
38
SCKO
39
BCK
40
B
LRCK
41
TEST
42
V
43
DD
DGND
44
DATA1
45
DATA2
46
DATA3
47
C
ZEROA
48
D
Block diagram
LRCK
BCK
DATA1(V
1,2)
OUT
input I/F
DATA2(V
3,4)
OUT
DATA3(V
5,6)
OUT
E
ML
MC
MDI
MDO
RST
SCKI
SCKO
F
38
1
2
36 35 34 33 32 31 30 29 28 27 26 25
1
2
3
4
5
6
Serial
Malti Function .
Malti Level
Digital Filter
Mode
Control
BPZ
I/F
Control 0
indication
Clock Manager
+3.3V Power supply +5V
V
DGND
DD
2
3
7
8
9
10 11 12
DAC
Output Amp
Module
DAC
Output Amp
DAC
Output Amp
V
AGND
V
CC
CC
AGND
DEQ-P8000/UC
3
24
V
3
CC
23
ADND3
22
V
4
CC
21
ADND4
20
V
5
CC
19
ADND5
18
V
6
CC
17
ADND6
16
CAP1
15
CAP2
14
V
1
OUT
13
V
2
OUT
2ch
V
1
OUT
LFP
V
2
OUT
+
2ch
V
3
OUT
LFP
V
4
OUT
+
V
5
2ch
OUT
LFP
V
6
OUT
+
ZEROA
ZERO1/GPO1
-
ZERO6/GPO6
4
4
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