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+1.8V(P)
+3.3V(P)
R 8bit
G 8bit
B 8bit
SYNC
IC9153
HD,VD
+5V(P)
+3.3V(PLL)
1
5
ER
AVR
14
4
HD,VD
IC9608
FPGA CONTROL
+3.3V(P)
4
+3.3V(P)
62
RESET
50MHz
CLK
Control DATA
SUS
SCAN
+5V(P)
106
IC9606
+3.3V(P)
RESET
5
RESET
4
IC9707
OR GATE
23
A
O
OR
B
REMOCON
IIC_INT
IIC_CONT
CABLE_DET
FPGA_CHIP
8
RESET
WER_STATUS
S_PANEL
BEL_DET
92
IC9455
PLASMA AI/SUB FIELD PROCESSOR
+3.3V(P)
+1.8V(P)
SUB-FIELD
NEW PLASMA AI
PROCESSOR
CLK
65MHz
60MHz
50MHz
IC9456
PLL
+3.3V(P)
SYNTHESIZER
37
+3.3V(P)
IC9303
FLASH
12
RESET
MEMORY 8M
PLL
SYNTHESIZER
IC9301
IC9601
Level Converter
Sustain Control DATA 6bit
3.3V -> 5V
20
Scan Control DATA 13bit
3.3V -> 5V
20
IC9603,04
LEVEL CONVERTER
26
11
LED_G
MC DATA IN
MCDATA
10
MC DATA OUT
28
LED_R
MCCLK
9
MC CLK
61
SS_SOS
RESET
42
LSIRESET
32
REM OUT
Q9708
INV.
29
REN INH
INV.
40
REM IN
Q9709
IC9709
CONVERT MICOM
D9730
XIN
22
56
IIC_INT
55
IIC_CONT
XOUT
23
60
CABLE DET
17
FPGA CHIP
48
MAIN RESET
RXD_TU
15
RXD_TU
TXD_TU
14
TXD_TU
RESET
19
RXD_PC
52
RXD_PC
TXD_PC
51
TXD_PC
1
SC_SOS1
64
SC_SOS2
35
POWER_STATUS
5
PANEL_SOS
INV.
60
CABEL_DET
Q9707
18
Vpss
57
+5V(STB-S)
44
RUSH ON/OFF
45
TV ON/OFF
47
M_POWER
46
KILL SOS
63
POWER_SOS
33
ALL OFF
3
3V_SOS
Video DATA
24biit(00A
Video DATA
18biit(08A
DATA
DRIVER
CLK
SCL2
SDA2
IC9453
IIC Bus
+2.5V(P)
64M
DDR-SDRAM
AVR
2
1
2
IC9454
X9302
IC9302
20MHz
+3.3V(PLL)
2
4
AVR
5
+5V(P)
X9702
9.216MHz
STB 5V
IC9710
RESET
RESET
D32
07A)
2
13A)
28
NCLKL
30
CLKL
31
CEL
34
PCL
35
REMOCON
41
CATS_EYE
44
50
+3.3V(P)
49
1
48
47
43
40
39
37
D31
2
21
NCLKR
26
CLKR
27
CER
30
PCR
31
UMH
35
UML
36
USH
37
USL
38
UE2H
39
UEH
40
50
49
48
47
43
23
D20
CL
2
CLK
3
SIU
4
SID
6
SCSU
7
CEL2
8
CPH
9
CEL
13
CBK
14
CSL
17
CSH
18
CML
19
CMH
20
+5V(P)
1
11
12
TH-37PA30E/TH-42PA30E
D-Board Block Diagram
TO C21
DATA L
L-DOWN
DATA L TIMING
+5V(P)
+5V(P)
+5V(P)
+5V(P)
STB_5V
LED_G
LED_R
DRVRST
TO C11
DATA R
R-DOWN
DATA R TIMING
+5V(P)
+5V(P)
+5V(P)
+5V(P)
SS_SOS
DRVRST
TO SC20
+5V(P)
SC_SOS1
SC_SOS2
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