Chipset Menu - Biostar BIPV10-IAP Setup Manual

Mini-ITX Mainboard Manual
3.5 C M
HIPSET
This submenu allows you to configure the specific features of the chipset installed
on your system. This chipset manage bus speeds and access to system memory
resources, such as DRAM. It also coordinates communications with the PCI bus.
Notice
Beware of that setting inappropriate values in items of this menu may cause
system to malfunction.
Main Advanced
Advanced Chipset Settings
WARNING: Setting wrong values in below sections
may cause system to malfunction.
> North Bridge Configuration
> South Bridge Configuration
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
North Bridge Configuration
North Bridge Chipset Configuration
PCI MMIO Allocation:
DRAM Frequency
Configure DRAM Timing by SPD
DRAM CAS# Latency
DRAM RAS# to CAS# Delay
DRAM RAS# Precarge
DRAM RAS# Activate to Precha [15 DRAM Clocks]
Initate Graphic Adapter
Internal Graphics Mode Select
PEG Port Congiguration
> Video Function Configuration
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
44
ENU
BIOS SETUP UTILITY
PCIPnP Boot Chipset
BIOS SETUP UTILITY
Chipset
[Auto]
[Enabled]
[5]
[5 DRAM Clocks]
[5 DRAM Clocks]
[PCI/IGD]
[Enabled,8MB]
Exit
Configure North Bridge
features.
Select Screen
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Options
Auto
667 MHz
Select Screen
Select Item
Change Option
+-
F1 General Help
F10 Save and Exit
Exit
ESC