VESTEL MB120 DS Service Manual page 72

1 2
AB_AVDD
N3
A0
AB_A0
P7
AB_A1 A1
P3
AB_A2 A2
N2
A3
AB_A3
P8
A4
AB_A4
A
P2
AB_A5 A5
R8
A6
AB_A6
R2
A7
AB_A7
T8
A8
AB_A8
R3
AB_A9 A9
L7
A10/AP
AB_A10
R7
A11
AB_A11
N7
A12/BC
AB_A12
T3
AB_A13 A13
J1
NC1
L1
NC2
M7
AB_A15 NC3
L9
U2
NC4
T7
NC5
AB_A14
J9
H5TQ2G63BFR-PB
NC6
M2
BA0
AB_BA0
N8
BA1
AB_BA1
B
M3
BA2
AB_BA2
J7
CK_0
AB_CK
K7
CK_1
AB_CKN
K9
AB_CKE CKE
L2
CS
A_CSN
J3
AB_RASN RAS
K3
CAS
AB_CASN
L3
WE
AB_WEN
T2
AB_RESETN RESET
L8
ZQ
240R
R5
C
AB_AVDD
N3
AB_A0 A0
P7
AB_A1 A1
P3
A2
AB_A2
N2
A3
AB_A3
P8
AB_A4 A4
P2
AB_A5 A5
R8
A6
AB_A6
R2
A7
AB_A7
T8
AB_A8 A8
R3
AB_A9 A9
L7
A10/AP
AB_A10
R7
A11
AB_A11
N7
AB_A12 A12/BC
T3
AB_A13 A13
D
J1
NC1
L1
NC2
M7
AB_A15 NC3
L9
U3
NC4
T7
NC5
AB_A14
J9 H5TQ2G63BFR-PB
NC6
M2
BA0
AB_BA0
N8
BA1
AB_BA1
M3
AB_BA2 BA2
J7
CK_0
B_CK
K7
CK_1
B_CKN
K9
B_CKE CKE
L2
CS
B_CSN
E
J3
RAS
AB_RASN
K3
CAS
AB_CASN
L3
WE
AB_WEN
T2
RESET
AB_RESETN
L8
ZQ
240R
R6
for STR
A_REF_DQ
AB_AVDD
C384
C260
100n 1n
10V
50V
F
AB_RESETN
C30
B_CKE
10n
16V
R10
C29
B_CK
AB_CK 22R
10n
R11
16V
B_CKN
22R
AB_CKN
AB_CKE
1 2
3
CD_AVDD
N3
A0
CD_A0
P7
CD_A1 A1
P3
CD_A2 A2
N2
A3
CD_A3
H1 P8
VREF_DQ A4
CD_A4
M8 P2
VREF_CA CD_A5 A5
R8
A6
CD_A6
E3 R2
DQL0 A7
A_DQL0 CD_A7
F7 T8
DQL1 A_DQL1 A8
CD_A8
F2 R3
DQL2 A_DQL2 CD_A9 A9
F8 L7
DQL3 A10/AP
A_DQL3 CD_A10
H3 R7
DQL4 A11
A_DQL4 CD_A11
H8 N7
DQL5 A12/BC
A_DQL5 CD_A12
G2 T3
DQL6 A_DQL6 CD_A13 A13
H7
DQL7
A_DQL7
J1
NC1
D7 L1
DQU0 A_DQU0 NC2
C3 M7
DQU1 A_DQU1 CD_A15 NC3
C8 L9
DQU2 NC4
A_DQU2
C2 T7
DQU3 NC5
A_DQU3 CD_A14
A7 J9
H5TQ2G63BFR-PB
DQU4 NC6
A_DQU4
A2
DQU5 A_DQU5
B8 M2
DQU6 BA0
A_DQU6 CD_BA0
A3 N8
DQU7 BA1
A_DQU7 CD_BA1
M3
BA2
CD_BA2
F3
DQSL_0 A_DQSL
G3 J7
DQSL_1 CK_0
A_DQSLN CD_CK
K7
CK_1
CD_CKN
B7
DQSU_1 A_DQSUN
C7 K9
DQSU_0 A_DQSU CD_CKE CKE
E7 L2
DML CS
A_DML C_CSN
D3
DMU A_DMU
J3
CD_RASN RAS
K1 K3
ODT CAS
AB_ODT CD_CASN
L3
WE
CD_WEN
T2
CD_RESETN RESET
L8
ZQ
240R
R8
CD_AVDD
N3
CD_A0 A0
P7
CD_A1 A1
P3
A2
CD_A2
N2
A3
CD_A3
H1 P8
VREF_DQ CD_A4 A4
M8 P2
VREF_CA CD_A5 A5
R8
A6
CD_A6
E3 R2
DQL0 A7
B_DQL0 CD_A7
F7 T8
DQL1 B_DQL1 CD_A8 A8
F2 R3
DQL2 B_DQL2 CD_A9 A9
F8 L7
DQL3 A10/AP
B_DQL3 CD_A10
H3 R7
DQL4 A11
B_DQL4 CD_A11
H8 N7
DQL5 B_DQL5 CD_A12 A12/BC
G2 T3
DQL6 B_DQL6 CD_A13 A13
H7
DQL7
B_DQL7
J1
NC1
D7 L1
DQU0 B_DQU0 NC2
C3 M7
DQU1 B_DQU1 CD_A15 NC3
C8 L9
DQU2 NC4
B_DQU2
C2 T7
DQU3 NC5
B_DQU3 CD_A14
A7 J9 H5TQ2G63BFR-PB
DQU4 B_DQU4 NC6
A2
DQU5 B_DQU5
B8 M2
DQU6 BA0
B_DQU6 CD_BA0
A3 N8
DQU7 BA1
B_DQU7 CD_BA1
M3
CD_BA2 BA2
F3
DQSL_0 B_DQSL
G3 J7
DQSL_1 CK_0
B_DQSLN D_CK
K7
CK_1
D_CKN
B7
DQSU_1 B_DQSUN
C7 K9
DQSU_0 B_DQSU D_CKE CKE
E7 L2
DML CS
B_DML D_CSN
D3
DMU B_DMU
J3
RAS
CD_RASN
K1 K3
ODT CAS
AB_ODT CD_CASN
L3
WE
CD_WEN
T2
RESET
CD_RESETN
L8
ZQ
240R
R7
for STR
B_REF_DQ
CD_AVDD
C383
C259
100n 1n
10V
50V
CD_RESETN
C31
D_CKE
10n
16V
C32
10n
16V
S325
B_CKE
3
4 5
R186
100R
1
R1
AB_A14
2
R2
AB_A8
3
AB_A11 R3
4
AB_A6 R4
R181
H1
VREF_DQ 100R
M8 1
VREF_CA AB_A1 R1
2
R2
AB_A4
E3 3
DQL0 R3
C_DQL0 AB_A12
F7 4
DQL1 R4
C_DQL1 AB_BA1
F2
DQL2 C_DQL2
R185
F8
DQL3 100R
C_DQL3
H3 8
DQL4 R1
C_DQL4 AB_A7
H8 7
DQL5 R2
C_DQL5 AB_A9
G2 6
DQL6 C_DQL6 AB_A13 R3
H7 5
DQL7 R4
C_DQL7
R184
D7
DQU0 C_DQU0 100R
C3 1
DQU1 C_DQU1 AB_BA2 R1
C8 2
U5
DQU2 R2
C_DQU2 AB_BA0
C2 3
DQU3 R3
C_DQU3 AB_A15
A7 4
DQU4 R4
C_DQU4 AB_WEN
A2
DQU5 C_DQU5
R183
B8
DQU6 100R
C_DQU6
A3 1
DQU7 R1
C_DQU7 AB_A2
2
R2
AB_A5
F3 3
DQSL_0 C_DQSL AB_A0 R3
G3 4
DQSL_1 R4
C_DQSLN AB_A3
R182
B7
DQSU_1 C_DQSUN 100R
C7 8
DQSU_0 C_DQSU R1
7
R2
AB_RASN
E7 6
DML R3
C_DML AB_CASN
D3 5
DMU C_DMU AB_ODT R4
R229
K1
ODT 100R
CD_ODT AB_A10
R228
NC
B_CKE 100R
NC R227
100R
AB_RESETN
R230
B_CK 100R
R231
100R
B_CKN
R192
100R
1
R1
CD_A14
2
CD_A8 R2
3
CD_A11 R3
4
R4
CD_A6
R187
H1
VREF_DQ 100R
M8 1
VREF_CA CD_A1 R1
2
R2
CD_A4
E3 3
DQL0 R3
D_DQL0 CD_A12
F7 4
DQL1 D_DQL1 CD_BA1 R4
F2
DQL2 D_DQL2
R191
F8
DQL3 100R
D_DQL3
H3 8
DQL4 R1
D_DQL4 CD_A7
H8 7
DQL5 D_DQL5 CD_A9 R2
G2 6
DQL6 D_DQL6 CD_A13 R3
H7 5
DQL7 R4
D_DQL7
R190
D7
DQU0 D_DQU0 100R
C3 1
DQU1 D_DQU1 CD_BA2 R1
C8 2
U4
DQU2 R2
D_DQU2 CD_BA0
C2 3
DQU3 R3
D_DQU3 CD_A15
A7 4
DQU4 D_DQU4 CD_WEN R4
A2
DQU5 D_DQU5
R189
B8
DQU6 100R
D_DQU6
A3 1
DQU7 R1
D_DQU7 CD_A2
2
CD_A5 R2
F3 3
DQSL_0 D_DQSL CD_A0 R3
G3 4
DQSL_1 R4
D_DQSLN CD_A3
R188
B7
DQSU_1 D_DQSUN 100R
C7 8
DQSU_0 D_DQSU R1
7
R2
CD_RASN
E7 6
DML R3
D_DML CD_CASN
D3 5
DMU D_DMU CD_ODT R4
R234
K1
ODT 100R
CD_ODT CD_A10
R233
NC
D_CKE 100R
R232
NC
100R
CD_RESETN
R235
D_CK 100R
R236
100R
D_CKN
C_REF_DQ D_REF_DQ
C385 C386
C261 C262
100n 1n 100n 1n
10V 10V
50V 50V
AB_AVDD
C2287
100n
16V
CD_AVDD
C2295
R12 100n
22R D_CK 16V
CD_CK
R13
S326
D_CKN D_CKE
CD_CKN 22R CD_CKE
4 5
6
DDR_VTT
8
F17
C894 AB_DDR3_A0
7 AB_A0
C17
10V 100n AB_A1 AB_DDR3_A1
6
E17
5 C269 AB_A2 AB_DDR3_A2
F18
10V 100n AB_DDR3_A3
AB_A3
B18
AB_DDR3_A4
AB_A4
E18
AB_A5 AB_DDR3_A5
8
A17
7 C893 AB_A6 AB_DDR3_A6
D17
10V 100n AB_DDR3_A7
6 AB_A7
C16
C263 AB_DDR3_A8
5 AB_A8
E16
10V 100n AB_A9 AB_DDR3_A9
B19
AB_A10 AB_DDR3_A10
B17
AB_A11 AB_DDR3_A11
1
D20
C892 AB_DDR3_A12
2 AB_A12
F16
10V 100n AB_A13 AB_DDR3_A13
3
B16
4 C268 AB_A14 AB_DDR3_A14
E20
10V 100n AB_DDR3_A15
AB_A15
E19
C895 AB_DDR3_BA0
AB_BA0
C18
10V 100n AB_BA1 AB_DDR3_BA1
8
F19
7 C891 AB_BA2 AB_DDR3_BA2
G22
10V 100n AB_DDR3_RASN
6 AB_RASN
F21
C267 AB_DDR3_CASN
5 AB_CASN
E21
10V 100n AB_WEN AB_DDR3_WEN
F20
AB_ODT AB_DDR3_ODT
S309
C19
C890 AB_DDR3_CKE
8 AB_CKE
F15
10V 100n AB_DDR3_RESETN
7 AB_RESETN
S310
A20
C266 AB_CK AB_DDR3_CK
6
B20
5 10V 100n AB_CKN AB_DDR3_CKN
E15
S311
A_DDR3_CSN
A_CSN
D15
B_DDR3_CSN
B_CSN
C889
1
C23
2 10V 100n A_DQL0 A_DDR3_DQL0
B22
C265 A_DDR3_DQL1
3 A_DQL1
B24
10V 100n A_DDR3_DQL2
4 A_DQL2
C21
A_DQL3 A_DDR3_DQL3
B25
C888 A_DQL4 A_DDR3_DQL4
C20
10V 100n A_DDR3_DQL5
A_DQL5
C24
C264 A_DDR3_DQL6
A_DQL6
B21
10V 100n A_DQL7 A_DDR3_DQL7
C22
C887 A_DML A_DDR3_DML
A23
10V 100n A_DQSL A_DDR3_DQSL
B23
C886 A_DDR3_DQSLN
A_DQSLN
10V 100n
D23
C270 A_DQU0 A_DDR3_DQU0
D26
10V 100n A_DDR3_DQU1
A_DQU1
E22
A_DDR3_DQU2
A_DQU2
D27
A_DQU3 A_DDR3_DQU3
F23
A_DQU4 A_DDR3_DQU4
DDR_VTT
E26
A_DDR3_DQU5
8 A_DQU5
D22
C905 A_DDR3_DQU6
7 A_DQU6
E25
10V 100n A_DQU7 A_DDR3_DQU7
6
E24
C277 A_DDR3_DMU
5 A_DMU
D24
10V 100n A_DDR3_DQSU
A_DQSU
E23
A_DDR3_DQSUN
A_DQSUN
8
C28
C904 B_DDR3_DQL0
7 B_DQL0
C26
10V 100n B_DDR3_DQL1
6 B_DQL1
B29
C272 B_DDR3_DQL2
5 B_DQL2
A26
10V 100n B_DQL3 B_DDR3_DQL3
C29
B_DDR3_DQL4
B_DQL4
C25
B_DDR3_DQL5
1 B_DQL5
A29
C903 B_DDR3_DQL6
2 B_DQL6
B26
10V 100n B_DQL7 B_DDR3_DQL7
3
B27
C276 B_DDR3_DML
4 B_DML
B28
10V 100n B_DDR3_DQSL
B_DQSL
C27
C902 B_DDR3_DQSLN
B_DQSLN
10V 100n
8
E29
C901 B_DDR3_DQU0
7 B_DQU0
C31
10V 100n B_DDR3_DQU1
6 B_DQU1
E27
C275 B_DQU2 B_DDR3_DQU2
5
D31
10V 100n B_DQU3 B_DDR3_DQU3
D29
B_DDR3_DQU4
B_DQU4
D30
C900 B_DDR3_DQU5
8 B_DQU5
E28
10V 100n B_DQU6 B_DDR3_DQU6
7
C30
6 C274 B_DQU7 B_DDR3_DQU7
B31
10V 100n B_DDR3_DMU
5 B_DMU
A31
B_DDR3_DQSU
B_DQSU
B30
B_DQSUN B_DDR3_DQSUN
1 C899
10V 100n
2
C273
3 CD_AVDD
10V 100n C2306 C2307 C2305 C2304 C2303
4
100n 100n 100n 100n 100n
C898 16V 16V 16V 16V 16V
10V 100n
C271
10V 100n
C897
10V
10V 100n
10u
C896
C23
10V 100n
1V5_VCC
C278
10V 100n
TP89
DDR_VTT
C14 C24
100n 10u
16V 10V
C2288 C2289 C2290 C2291 C2292
100n 100n 100n 100n 100n
16V 16V 16V 16V 16V
C2294 C2293 C2296 C2297 C2298
VESTEL
100n 100n 100n 100n 100n
16V 16V 16V 16V 16V
SCH NAME :
DRAWN BY :
6
7 8
U6
MSD95M0D
H28
1 CD_DDR3_A0
CD_A0
K31
CD_DDR3_A1 CD_A1
J29
CD_DDR3_A2 CD_A2
K27
CD_DDR3_A3
CD_A3
K30
CD_DDR3_A4
CD_A4
J28
CD_DDR3_A5 CD_A5
K32
CD_DDR3_A6 CD_A6
H31
CD_DDR3_A7
CD_A7
J32
CD_DDR3_A8
CD_A8
G30
CD_DDR3_A9 CD_A9
L30
CD_DDR3_A10 CD_A10
J30
CD_DDR3_A11 CD_A11
L29
CD_DDR3_A12
CD_A12
G31
CD_DDR3_A13 CD_A13
J31
CD_DDR3_A14 CD_A14
M28
CD_DDR3_A15
CD_A15
L28
CD_DDR3_BA0
CD_BA0
L31
CD_DDR3_BA1 CD_BA1
K28
CD_DDR3_BA2 CD_BA2
N28
CD_DDR3_RASN
CD_RASN
N27
CD_DDR3_CASN
CD_CASN
L27
CD_DDR3_WEN CD_WEN
M27
CD_DDR3_ODT CD_ODT
S314
M31
CD_DDR3_CKE
CD_CKE
G32
CD_DDR3_RESETN
CD_RESETN
S313
N32
CD_DDR3_CK CD_CK
M30
CD_DDR3_CKN CD_CKN
G29
S312
C_DDR3_CSN
C_CSN
F32
D_DDR3_CSN
D_CSN
T31
C_DDR3_DQL0 C_DQL0
P30
C_DDR3_DQL1
C_DQL1
T30
C_DDR3_DQL2
C_DQL2
P31
C_DDR3_DQL3 C_DQL3
U30
C_DDR3_DQL4 C_DQL4
N31
C_DDR3_DQL5
C_DQL5
U31
C_DDR3_DQL6
C_DQL6
N30
C_DDR3_DQL7 C_DQL7
R31
C_DDR3_DML C_DML
T32
C_DDR3_DQSL
C_DQSL
R30
C_DDR3_DQSLN
C_DQSLN
P27
C_DDR3_DQU0 C_DQU0
U29
C_DDR3_DQU1
C_DQU1
P28
C_DDR3_DQU2
C_DQU2
U27
C_DDR3_DQU3 C_DQU3
R28
C_DDR3_DQU4 C_DQU4
V28
C_DDR3_DQU5
C_DQU5
P29
C_DDR3_DQU6
C_DQU6
U28
C_DDR3_DQU7 C_DQU7
T28
C_DDR3_DMU
C_DMU
T27
C_DDR3_DQSU
C_DQSU
R27
C_DDR3_DQSUN
C_DQSUN
AA31
D_DDR3_DQL0
D_DQL0
W31
D_DDR3_DQL1
D_DQL1
AA30
D_DDR3_DQL2
D_DQL2
W32
D_DDR3_DQL3 D_DQL3
AB31
D_DDR3_DQL4
D_DQL4
V31
D_DDR3_DQL5
D_DQL5
AB32
D_DDR3_DQL6
D_DQL6
V30
D_DDR3_DQL7 D_DQL7
W30
D_DDR3_DML
D_DML
Y30
D_DDR3_DQSL
D_DQSL
Y31
D_DDR3_DQSLN
D_DQSLN
Y28
D_DDR3_DQU0
D_DQU0
AB27
D_DDR3_DQU1
D_DQU1
V27
D_DDR3_DQU2 D_DQU2
AB29
D_DDR3_DQU3 D_DQU3
W28
D_DDR3_DQU4
D_DQU4
AB28
D_DDR3_DQU5
D_DQU5
W27
D_DDR3_DQU6 D_DQU6
AA27
D_DDR3_DQU7 D_DQU7
Y27
D_DDR3_DMU
D_DMU
AA28
D_DDR3_DQSU
D_DQSU
Y29
D_DDR3_DQSUN D_DQSUN
DDR TERMINATION
16V
100n
10V 16V
C16
10u 100n
C21 C13
16V
1 DDQ 8
VTTREF 100n
U1 C15 R28
2 7
3V3_VCC
VTT EN 100k
MP20073DH
R9
3 6
GND REF 22R 1V5_VCC
C22
4 5
3V3_VCC
10u VTTSEN VDRV
10V
16V C25
100n 4u7
C17 10V
18mb120-r2
PROJECT NAME : A3
15
03_G6F_DDR3 T. SHT:
NAMIK GOKCEDAGLI
15-08-2016_15:00
7 8
A
B
C
D
E
F
A X M