Stdp4320 (Dp1.2 Splıtter Ic) - VESTEL MB120 DS Service Manual

10. STDP4320 (DP1.2 SPLITTER IC)
General Description
The STDP4320 is a high-speed DisplayPort dual mode splitter IC targeted for audio-video demultiplexing
and routing in applications such as notebooks, docking stations, video hub, 4K2K TVs, daisy chainable
monitors, digital signage, etc. It consists of one dual mode input port and two dual mode output ports
configurable as either DisplayPort or HDMI/DVI. STDP4320 is a VESA DP Standard Ver. 1.2a compliant
device that supports advanced features such as MST, HBR2, 3D formats and GTC assist. Designs based on
STDP4320 have the flexibility to offer either DP or HDMI/DVI connectors on its end product to interface with
legacy and new generation video sources and sinks. In addition, STDP4320-based products with a DisplayPort
output connector are DP++ compliant and work with any HDMI or single link DVI sink through a passive level
translator (dongle). The STDP4320 uses MegaChips' latest generation DisplayPort dual mode receiver and
transmitter technology that supports both DisplayPort and TMDS signal formats. This device receives MST
format up to eight audio-video streams, which can be further routed on either of the two outputs in any
combination of eight streams depending on the capability of downstream sinks. This device can also replicate
the incoming video streams on both output ports simultaneously, thus allowing cloning on two downstream
sinks. For example, a 4K2K 60 Hz video input is replicated on two output ports simultaneously. The
DisplayPort receiver and transmitters support HBR2 speed, a data rate of 5.4 Gbps per lane with a total
bandwidth of 21.6 Gbps link rate. In HDMI mode, this device supports link rates up to 3.2 Gbps corresponding
to a pixel rate of 300 MHz, adequate for supporting video resolution up to FHD 120 Hz with all 3D formats.
The device is also capable of delivering deep color video up to 16-bits per color. The STDP4320 allows audio
transport from the source to the desired audio rendering devices over the video output port or through an SPDIF
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Figure 17: Pin configuration.
Table 27: Pin description.