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Application Note FCP Option (Model 875)
Vector Signal Generator (VSG) Fast Control Port
Purpose
The VSG can now be controlled over an additional port for fast time-critical settings and
data streaming. This application note explains the configuration and usage of the Fast
Control Port option.
Table of Contents
Introduction ............................................................................................................................ 2
FCP Operation Modes ............................................................................................................ 2
IQ Data Streaming with FCP ................................................................................................... 3
Setup FCP for IQ Data Streaming ........................................................................................ 3
Related SCPI Commands ..................................................................................................... 3
IQ Stream Timing................................................................................................................. 4
SCPI & FCP Example ............................................................................................................ 5
FCP Input Delay Calibration ................................................................................................ 5
Step by Step Guide for Calibration ................................................................................... 6
Required Signals during Calibration ................................................................................ 6
Selecting Memory Segments .................................................................................................. 9
Setup for Selecting Memory Segments .............................................................................. 9
FCP Segment SCPI Commands ............................................................................................ 9
Segment Stream Timing ...................................................................................................... 9
SCPI & FCP Example .......................................................................................................... 10
FCP Test Mode ...................................................................................................................... 11
Related SCPI Commands ................................................................................................... 11
FCP IQ Stream in Test Mode ............................................................................................. 11
FCP Segment Stream in Test Mode ................................................................................... 13
Cable Assembly .................................................................................................................... 14
Further Documentation........................................................................................................ 14
2955 Kerner Blvd. • San Rafael, CA 94901 • Tel: (415) 453-9955 • info@berkeleynucleonics.com
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Summary of Contents for BNC AnaPico 875
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Page 1: Table Of Contents
Application Note FCP Option (Model 875) Vector Signal Generator (VSG) Fast Control Port Purpose The VSG can now be controlled over an additional port for fast time-critical settings and data streaming. This application note explains the configuration and usage of the Fast Control Port option. -
Page 2: Introduction
Introduction The fast control port is a parallel port with the possibility for the user to control specific aspects of the IQ modulation of the VSG. When activated, the FCP can be configured to operate in one of two main modes. The interface is set to stream either IQ data or memory segment IDs. -
Page 3: Iq Data Streaming With Fcp
IQ Data Streaming with FCP The FCP can be set as an input for IQ modulation data which is then directly applied to modulate the carrier frequency. To configure the device to receive IQ data on the FCP, the FCP must be set into IQ streaming mode, and the FCP must additionally be set as the source of the IQ modulation data. -
Page 4: Iq Stream Timing
[:SOURce]:FCPort:STReam:IQ OFF|ON|0|1 Sets the FCP to stream IQ data. *RST value: OFF Figure 2: The FCP:STR:IQ SCPI command determines if the FCP is in IQ streaming mode. The received data is then forwarded to potentially modulate the carrier frequency. Note that this mode can only be enabled if all other FCP modes are disabled. -
Page 5: Scpi & Fcp Example
The FCP receives a valid signal that is synchronized with the first valid I-data sample, followed by the first Q-data sample. The valid signal should be driven low during the setup of the device to ensure proper sampling of I and Q data samples. The phase relationship of input signals to the FCP are depicted in Figure 4. -
Page 6: Step By Step Guide For Calibration
Step by Step Guide for Calibration Startup the device Physically connect an external reference clock to the VSG device Lock to the external reference a. SCPI commands ROSC:EXT:FREQ <freq> set the external reference frequency ROSC:SOUR EXT set the reference clock source to external b. - Page 7 • A stable 250 MHz at the clock pin for FCP with 125 MSps playback rate or • A stable 500 MHz at the clock pin for FCP with 250 MSps playback rate. For a proper calibration setup, please make sure the clock signal on the FCP input is generated with the same reference clock as the reference clock for the VSG.
- Page 8 Valid Signal The signal at the valid pin of the FCP (see electrical specifications for pin mapping) must stay low while the FCP is being enabled. In Figure 5 and Figure 6, the time periods for which the valid signal is high or low are labeled �� and ��...
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Page 9: Selecting Memory Segments
Selecting Memory Segments The fast control port (FCP) can be configured to receive memory segment IDs to select desired memory segments for playback. When the FCP is configured in segment selection mode, the FCP cannot be configured to run in any other mode simultaneously. The FCP expects a 16-bit wide memory segment ID, as well as a valid signal that indicates when a new ID is valid at the FCP. -
Page 10: Scpi & Fcp Example
Segment IDs and valid bit edges are transferred at the same time. The FCP reads the input with a sampling rate of 250 Mb per second for each signal which naturally limits the switching of the valid signal to every 4 ns at the earliest. VALID ADDR Figure 8: Timing diagram for memory segment inputs (not to scale) -
Page 11: Fcp Test Mode
FCP Test Mode The following sections describe the behavior of the FCP in test mode. For each streaming mode of the FCP, the functionality of the test varies to account for the type of transmission employed in the specific streaming mode. There are two SCPI commands for FCP testing. - Page 12 Once a sufficient clock signal is applied, the IQ data can be tested for correct transmission. The FCP IQ stream mode contains a built-in test that makes use of a linear feedback shift register (LFSR) to generate a pseudo-random test pattern for the I-data and the Q-data separately.
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Page 13: Fcp Segment Stream In Test Mode
FCP Segment Stream in Test Mode The test mode for the memory segment address stream is a lot simpler than for the IQ streaming mode. Since the transmission is not source-synchronous, but the data is sampled at the FCP input, there is only diagnostic information about the valid bit and the received address. -
Page 14: Cable Assembly
FCP. For recommendations on parts for a custom cable for either IQ streaming or segment address streaming, please contact your Berkeley Nucleonics representative directly. Further Documentation [1]BNC Programmer’s Manual for Signal Generators https://www.berkeleynucleonics.com/downloads Berkeley Nucleonics Corporation Phone...
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