HPS-621U4A
2.4.7 CPLD DEBUG header (JCPLD_DEBUG1)
* Default
2.4.8
Audio connector (JHD-AUDIO1)
22 HPS-621U4A Quick Reference Guide
Force Power on
Signal
PIN PIN
+3.3V
AUD_AZA_SYNC_R
AUD_AZA_SDO_R
AUD_AZA_SDI1
+5VSB
Normal mode*
Signal
1
2
GND
3
4
AUD_AZA_BCLK_R
5
6
AUD_AZA_SDI0
7
8
AUD_AZA_RST_R_N
9
10
GND